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Overview

Description

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The Intersil HCS374MS is a Radiation Hardened non-inverting octal D-type, positive edge triggered flip-flop with three-stateable outputs. The HCS374MS utilizes advanced CMOS/SOS technology. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). Data is also transferred to the outputs during this transition. The output enable (OE) controls the three-state outputs and is independent of the register operation. When the output enable is high, the outputs are in the high impedance state. The HCS374MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS374MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).

Features

  • 3 Micron Radiation Hardened SOS CMOS
  • Total Dose 200K RAD (Si)
  • SEP Effective LET No Upsets: >100 MEV-cm2/mg
  • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
  • Dose Rate Survivability: >1 x 1012 RAD (Si)/s
  • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
  • Latch-Up Free Under Any Conditions
  • Fanout (Over Temperature Range)
  • Bus Driver Outputs - 15 LSTTL Loads
  • Military Temperature Range: -55°C to +125°C
  • Significant Power Reduction Compared to LSTTL ICs
  • DC Operating Voltage Range: 4.5V to 5.5V
  • Input Logic Levels
  • VIL = 0.3 VCC Max
  • VIH = 0.7 VCC Min
  • Input Current Levels Ii 5µA at VOL, VOH

Comparison

Applications

Documentation

Type Title Date
Datasheet PDF 562 KB
Brochure PDF 467 KB
2 items

Design & Development

Models

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Diagram of ECAD Models

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