Overview
Description
Ultra low power main clock for VIA VX900 chipset
Features
- Features/Benefits:
- Supports programmable spread percentage and frequency
- Uses external 14.318MHz crystal, external crystal load caps are required for frequency tuning
- Low power differential clock outputs (No 50Ω resistor to GND needed)
- Programmable output skew
- Programmable watchdog safe frequency
- Integrated 33ohm series resistor on all differential outputs
- Low power supply voltage support for differential outputs
- Meets PCIEX Gen2 specifications
- Uses 1.5V core voltage for ultra low power design
- Output programmable slew rate controls
- Key Specifications:
- CPU output cycle-cycle jitter < 85ps
- PCIEX output cycle-cycle jitter < 125ps
- +/- 100ppm frequency accuracy for all output clocks
- CPU-AGP skew ~ 1.1ns typical
- AGP-PCIA skew ~ 1.06ns typical
- AGP-PCIB skew ~ 1.46ns typical
- CPU1-PCIA skew ~ 2.16ns typical
- CPU1-PCIB skew ~ 2.46ns typical
Comparison
Applications
Documentation
Featured Documentation
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| Type | Title | Date |
| Datasheet | PDF 344 KB | |
| End Of Life Notice | PDF 160 KB | |
| Product Change Notice | PDF 39 KB | |
| Product Change Notice | PDF 611 KB | |
| Product Change Notice | PDF 611 KB | |
| Product Change Notice | PDF 596 KB | |
| Product Change Notice | PDF 544 KB | |
| Product Change Notice | PDF 95 KB | |
| Product Change Notice | PDF 50 KB | |
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Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Product Options
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