CD4098BMS dual monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed voltage timing application. An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX. Leading edge triggering (+TR) and trailing edge triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD4098BMS is not used, its RESET should be tied to VSS. In normal operation the circuit triggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q is connected to -TR when leading edge triggering (+TR) is used or Q is connected to +TR when trailing edge triggering (-TR) is used. The time period (T) for this multivibrator can be approximated by: TX = 1/2RXCX for CX 3 0. 01µF. Time periods as a function of RX for values of CX and VDD are given in Figure 8. Values of T vary from unit to unit and as a function of voltage, temperature, and RXCX. The minimum value of external resistance, RX, is 5kΩ. The maximum value of external capacitance, CX, is 100µF. Figure 9 shows time periods as a function of CX for values of RX and VDD. The output pulse width has variations of ±2.5% typically, over the temperature range of -55 °C to +125 °C for CX = 1000pF and RX = 100kΩ. For power supply variations of ±5%, the output pulse width has variations of ±0. 5% typically, for VDD = 10V and 15V and ±1% typically, for VDD = 5V at CX = 1000pF and RX = 5kΩ. The CD4098BMS is supplied in these 16-lead outline packages: Braze Seal DIP H4T Frit Seal DIP H1F Ceramic Flatpack H6W


  • High voltage type (20V rating)
  • Retriggerable/Resettable capability
  • Trigger and Reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q buffered outputs available
  • Separate resets
  • Wide range of output pulse widths
  • 100% tested for quiescent current at 20V
  • 5V, 10V and 15V parametric ratings
  • Standardized symmetrical output characteristics
  • Maximum input current of 1µA at 18V over full package temperature range; 100nA at 18V and +25supo/supC
  • Noise margin (Over full package/temperature range) 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
  • Meets all requirements of JEDEC tentative standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"




  • Pulse delay and timing
  • Pulse shaping


Type Title Date
Datasheet PDF 405 KB
Brochure PDF 467 KB
Brochure PDF 4.85 MB
Price Increase Notice PDF 360 KB
White Paper PDF 533 KB
Product Advisory PDF 499 KB
Product Change Notice PDF 230 KB
Application Note PDF 338 KB
9 items

Design & Development