The ISL33003MSOPEVAL1Z evaluation board is designed to provide a quick and easy method for evaluating the ISL33003 two-channel bus buffer with rise time accelerators and hot-swap capability.
Discrete NMOS transistors are used to produce the pull-down functions of a wired-AND bus. Each SDA/SCL pin on the buffer is connected to an external open-drain NMOS transistor. The evaluation board also contains connections for the bus pull-up resistor and load capacitance. The logic input pins on the ISL33003 IC can be held logic High by a pull-up resistor or driven dynamically with an external logic source.
The ISL33003 two-channel bus buffer provides the buffering necessary to extend the bus capacitance beyond the 400pF maximum specified by the I2C specification. In addition, the ISL33003 features rise time accelerator circuitry to reduce power consumption from passive bus pull-up resistors and improve data-rate performance. The device also includes hot-swap circuitry to prevent corruption of the data and clock lines when I2C devices are plugged into a live backplane, and the ISL33003 adds level translation for mixed supply voltage applications.
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