The R1RW0416D is a 4-Mbit High-Speed static RAM organized 256-kword × 16-bit. It has realized High-Speed access time by employing CMOS process (6-transistor memory cell) and High-Speed circuit designing technology. It is most appropriate for the application which requires High-Speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. Especially, LVersion and S-Version are low power consumption and it is the best for the battery backup system. The package prepares 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density surface mounting.


  • Single 3.3 V supply: 3.3 V ± 0.3 V
  • Access time: 10 ns / 12 ns (max)
  • Completely static memory No clock or timing strobe required
  • Equal access and cycle times
  • Directly TTL compatible All inputs and outputs
  • Operating current: 145 / 130mA (max)
  • TTL standby current: 40 mA (max)
  • CMOS standby current : 5 mA (max) : 0.8 mA (max) (L-version) : 0.5 mA (max) (S-version)
  • Data retention current : 0.4 mA (max) (L-version) :0.2 mA (max) (S-version)
  • Data retention voltage: 2.0 V (min) (L-version , S-version)
  • Center VCC and VSS type pin out


製品名 PLP Part Status Pkg. Type Carrier Type 購入/サンプル
2030-03-01 Active TSOP(2) Tray
2030-03-01 Active TSOP(2) Embossed Tape


タイトル 他の言語 分類 形式 サイズ 日付
R1RW0416Dシリーズ データシート English データシート PDF 652 KB
半導体製品 包装材変更のお願い(一部内容の追加及び修正) English 製品変更通知 PDF 4.87 MB
半導体製品 包装材変更のお願い ( PC-WRP-A001B/J ) English 製品変更通知 PDF 3.82 MB
半導体製品 包装材変更のお願い ( PC-WRP-A001A/J ) English 製品変更通知 PDF 1.91 MB
Package Drawing TSOP(2) 44pin PTSB0044GG-A パッケージ外形図 PDF 79 KB
Renesas Semiconductor Lead-Free Packages カタログ PDF 1.32 MB