The ClockMatrix family of devices are high-performance, precision timing solutions designed to simplify clock designs for applications with up to 800Gbps interface speeds.

They can be used anywhere in a system to perform critical timing functions, such as clock generation, frequency translation, jitter attenuation, and phase alignment. The device can be used to precisely synchronize IEEE 1588 Time Stamp Units (TSUs) and SyncE ports on wireless baseband, DU, CU, RU, fronthaul or backhaul networks. The family of devices support multiple independent timing channels for: IEEE 1588 clock synthesis; SyncE clock generation; jitter attenuation and radio clock generation including SYSREF generation for converters. Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed. The device outputs ultra-low-jitter clocks that can directly synchronize SERDES running at up to 112Gbps; as well as CPRI/OBSAI, SONET/SDH ADC/DAC, and IEEE 1588 TSUs. To easily implement synchronization in IEEE 1588 systems, Renesas offers PTP clock manager software for free under license.

Key features include:

  • Flexibility – PLL channels are individually configurable as a synthesizer, jitter attenuator, or DCO
  • Integration – up to 8 DPLLs and 14 outputs in a single package
  • Performance – RMS jitter as low as 88 fs (typ)
  • Standards compliant – IEEE 1588, OTN, and SyncE
  • Programmable – I2C, SPI or OTP
  • Device Monitoring – Built-in ability to monitor reference inputs, DPLL and APLL loss of lock, Holdover status
  • Right size for the job – Package options from 144-BGA down to 48-QFN

Featured Document: ClockMatrix Family Overview

Documentation

Title Type Date
PDF164 KB
Application Note
PDF1.57 MB
Application Note
PDF275 KB
Application Note
PDF1.92 MB
Application Note
PDF542 KB
Application Note
PDF692 KB
Application Note
PDF2.13 MB
Application Note
PDF393 KB
Application Note
PDF231 KB
Application Note
PDF552 KB
Application Note
PDF385 KB
Application Note
PDF272 KB
Application Note
PDF406 KB
Application Note
PDF304 KB
Application Note
PDF839 KB
Application Note
PDF390 KB
Application Note
PDF880 KB
Application Note
PDF584 KB
Application Note
PDF162 KB
Application Note
PDF550 KB
Application Note
PDF739 KB
Application Note
PDF633 KB
Application Note
PDF479 KB
Application Note
PDF442 KB
Application Note
PDF566 KB
Application Note
PDF976 KB
Application Note
PDF659 KB
Application Note
PDF38 KB
Device Errata
PDF2.54 MB
Guide
PDF936 KB
Guide
PDF10.53 MB
Guide
PDF2.35 MB
Guide
PDF143 KB
Guide
PDF2.35 MB
Guide
PDF486 KB
Manual - Hardware
XLSX321 KB
Other
PDF320 KB
Overview
PDF253 KB
Release Note
PDF170 KB
Release Note
PDF103 KB
Release Note
PDF94 KB
Release Note
PDF199 KB
Schematic
PDF98 KB
Schematic
PDF288 KB
Schematic
PDF206 KB
Schematic

Downloads

Title Type Date
ZIP73 KB
Software & Tools - Other
ZIP1.73 MB
Software & Tools - Other
PDF488 KB
Software & Tools - Other
PDF222 KB
Software & Tools - Other
ZIP177 KB
Software & Tools - Other
ZIP177 KB
Software & Tools - Other
ZIP615 KB
Software & Tools - Software
ClockMatrix™2 System Synchronizer Overview

The ClockMatrix™ 2 family of devices are high-performance, precision timing solutions designed to simplify clock designs for applications with up to 800Gbps interface speeds. This second-generation family delivers improved performance with phase jitter as low as 88fs RMS. The highly integrated devices serve as full-function IEEE 1588 synchronization clocks and ultra-low jitter reference clocks for synchronous Ethernet PHYs with data rates up to 112Gbps PAM-4, reducing design complexity and bill of materials (BOM). Visit renesas.com/clockmatrix to learn more.