Overview

Description

The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.

Features

  • Free-running CLKA and CLKB may be asynchronous or coincident
  • Two independent clocked FIFOs buffering data in opposite directions
  • Mailbox bypass register for each FIFO
  • Programmable Almost-Full and Almost-Empty flags
  • Supports clock frequencies up to 83MHz
  • Fast access times of 8ns
  • Available in 120-pin TQFP package
  • Industrial temperature range (–40C to +85C) is available

Documentation

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PDF262 KB
Datasheet
PDF86 KB
End Of Life Notice
PDF30 KB
End Of Life Notice
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Guide
PDF24 KB
Product Change Notice
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Product Change Notice

Design & Development

Software & Tools

Software Downloads

Title Type Date
PDF86 KB
End Of Life Notice
PDF30 KB
End Of Life Notice

Models

Models

Title Type Date
ZIP10 KB
Model - IBIS
Model - SPICE

Support