The 5PB1102 is a high-performance 1:2 LVCMOS clock buffer. It has best-in-class Additive Phase Jitter of 50fsec RMS.
 
The 5PB1102 also supports an Output Enable function. It is available in 8-pin DFN and TSSOP packages and can operate from a 1.8V to 3.3V supply.

Features

  • High performance 1:2 LVCMOS clock buffer
  • Very low pin-to-pin skew <50ps
  • Very low additive jitter <50fs
  • Supply voltage: 1.8V to 3.3V
  • fmax = 200MHz
  • Integrated serial termination for 50ohm channel
  • Packaged in 8-pin TSSOP and small DFN packages
  • Extended (-40°C to +105°C) temperature range

Product Options

Orderable Part ID Part Status Pkg. Type Lead Count (#) Temp. Range Carrier Type Buy Sample
5PB1102CMGI
Package Info
 Active COL 8 -40 to 85°C Cut Tape
Availability

Buy / Quote
5PB1102CMGI8
Package Info
 Active COL 8 -40 to 85°C Reel
Availability
Buy / Quote
5PB1102PGGI
Package Info
 Active TSSOP 8 -40 to 85°C Tube
Availability

Buy / Quote
5PB1102PGGI8
Package Info
 Active TSSOP 8 -40 to 85°C Reel
Availability
Buy / Quote
5PB1102CMGK
Package Info
 Active COL 8 -40 to 105°C Cut Tape
Availability

Buy / Quote
5PB1102CMGK8
Package Info
 Active COL 8 -40 to 105°C Reel
Availability
Buy / Quote
5PB1102PGGK
Package Info
 Active TSSOP 8 -40 to 105°C Tube
Availability

Buy / Quote
5PB1102PGGK8
Package Info
 Active TSSOP 8 -40 to 105°C Reel
Availability
Buy / Quote

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
5PB11xx Family Datasheet – Datasheet PDF 355 KB
Application Notes & White Papers
AN-845 Termination - LVCMOS – Application Note PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection – Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals – Application Note PDF 442 KB
AN-815 Understanding Jitter Units – Application Note PDF 565 KB
PCNs & PDNs
PCN# : A1905-02 Adding Carsem, Malaysia as Alternate Assembly Location & Change Material Sets – Product Change Notice PDF 268 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly – Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly – Product Change Notice PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location – Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location – Product Change Notice PDF 544 KB
Downloads
5PB11xx Family IBIS Model – Model - IBIS ZIP 24 KB
Other
Clock Distribution Overview 日本語 Overview PDF 217 KB
IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview – Overview PDF 252 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
info: For device-specific or order-specific documentation, submit a support request.

News & Additional Resources

Type Date
Buff Up Your Design with IDT Clock Buffers Blog Post Dec 14, 2018
An Insider’s Guide to Finding the Right Timing Device for Your System Blog Post Dec 18, 2017
Why Fanout Buffers Make More Sense Blog Post Nov 28, 2017
Time for Performance Blog Post Oct 11, 2017
IDT Introduces Ultra-Low-Jitter Family of LVCMOS Clock Buffers News Mar 24, 2015