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概要

The 83PN625I is a programmable LVPECL synthesizer that is "forward" footprint compatible with standard 5mm x 7mm oscillators. The device uses IDT's fourth generation FemtoClock® NG technology for an optimum of high clock frequency and low phase noise performance. Forward footprint compatibility means that a board designed to accommodate the crystal oscillator interface and the optional control pins is also fully compatible with a canned oscillator footprint - the canned oscillator will drop onto the 10-VFQFN footprint for second sourcing purposes. This capability provides designers with programability and lead time advantages silicon/crystal based solutions while maintaining compatibility with industry standard 5mm x 7mm oscillator footprints for ease of supply chain management. Oscillator-level performance is maintained with IDT's 4th Generation FemtoClock® NG PLL technology, which delivers sub 0.5ps rms phase jitter. The 83PN625I defaults to 312.5MHz using a 25MHz crystal with 2 programming pins floating (pulled down/pulled up with internal pullup or pulldown resistors) but can also be set to 4 different frequency multiplier settings to support a wide variety of applications. The below table shows some of the more common application settings.

83PN625I - Block Diagram
83PN625I - Pinout
83PN625I - Block Diagram
83PN625I - Pinout
  • Fourth Generation FemtoClock® Next Generation (NG) technology
  • Footprint compatible with 5mm x 7mm differential oscillators
  • One differential LVPECL output pair
  • Crystal oscillator interface which can be overdriven by a single-ended reference clock
  • Output frequency range: 125MHz – 625MHz
  • Crystal/input frequency range: 25MHz, parallel resonant crystal
  • VCO range: 2GHz – 2.5GHz
  • Cycle-to-cycle jitter: 10ps (maximum), @ 3.3V±5%
  • RMS phase jitter @ 156.25MHz, 12kHz – 20MHz: 0.348ps (typical)
  • Full 3.3V or 2.5V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in a lead-free (RoHS 6) package

ドキュメント

タイトル 分類 日付
ICS83PN625I Datasheet
PDF352 KB
データシート
AN-805 Recommended Ferrite Beads
PDF91 KB
アプリケーションノート
AN-827 Application Relevance of Clock Jitter
PDF1.99 MB
アプリケーションノート
AN-828 Termination - LVPECL
PDF322 KB
アプリケーションノート
AN-831 The Crystal Load curve
PDF395 KB
アプリケーションノート
AN-844 Termination - AC Coupling Clock Receivers
PDF170 KB
アプリケーションノート
AN-842 Thermal Considerations in Package Design and Selection
PDF495 KB
アプリケーションノート
AN-840 Jitter Specifications for Timing Signals
PDF442 KB
アプリケーションノート
AN-838 Peak-to-Peak Jitter Calculations
PDF115 KB
アプリケーションノート
AN-839 RMS Phase Jitter
PDF233 KB
アプリケーションノート
AN-832 Timing Budget and Accuracy
PDF131 KB
アプリケーションノート
AN-834 Hot-Swap Recommendations
PDF153 KB
アプリケーションノート
AN-835 Differential Input with VCMR being VIH Referenced
PDF160 KB
アプリケーションノート
AN-836 Differential Input to Accept Single-ended Levels
PDF120 KB
アプリケーションノート
AN-837 Overdriving the Crystal Interface
PDF133 KB
アプリケーションノート
AN-830 Quartz Crystal Drive Level
PDF143 KB
アプリケーションノート
AN-815 Understanding Jitter Units
PDF565 KB
アプリケーションノート
AN-802 Crystal-Measuring Oscillator Negative Resistance
PDF136 KB
アプリケーションノート
AN-801 Crystal-High Drive Level
PDF202 KB
アプリケーションノート
AN-806 Power Supply Noise Rejection
PDF438 KB
アプリケーションノート
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products
PDF108 KB
アプリケーションノート
Errata# NEN-11-03
PDF62 KB
デバイスエラッタ
PDN# : CQ-16-04 QUARTER MARKET DECLINED PDN
PDF560 KB
EOL通知
PCN# : W1308-01 Change of Passivation Thickness
PDF941 KB
製品変更通知

設計・開発

ソフトウェアダウンロード

タイトル 分類 日付
PDN# : CQ-16-04 QUARTER MARKET DECLINED PDN
PDF560 KB
EOL通知

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モデル

Title Type Date
83PN625I IBIS Model
ZIP70 KB
モデル－IBIS

製品選択

    Processing table
    型名
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    83PN625DKILF
    block_flippedObsolete
    memory
    view_in_ar
    		VFQFPN 10 I Yes Tray
    83PN625DKILFT
    block_flippedObsolete
    memory
    view_in_ar
    		VFQFPN 10 I Yes Reel
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