概要
説明
Quickly evaluate the amplifier, filter, and analog-to-digital converter (ADC) signal chain's total performance in your application. Pairing with Renesas' ADC KMB-001LEVALZ motherboard, this amplifier + ADC daughterboard provides a 100kHz to 100MHz flat data acquisition channel requiring only 200mV p-p (-10dBm) full-scale input signal. It interfaces directly with Renesas' proven ADC analysis Konverter software. Typically consuming <680mW in the amplifier + ADC, this example design also offers a starting point for customizing this board to specific end equipment requirements.
The input transformers, amplifier gain and interstage filter design can be tuned for a given application, allowing a user to try different circuit configurations to evaluate performance tradeoffs. In addition, the 12-bit 500MSPS ADC can be swapped out for any of the 20-pin compatible ADCs from the Renesas ADC family. These low power ADC's span the 8- to 14-bit range with max sample rates from 125MSPS to 500MSPS.
特長
- Clock rate range: 200MSPS to 500MSPS
- 200mV p-p input (-10dBm) for -1dBFS ADC input
- ±0.5dB flat response: 100kHz to 100MHz
- Typical SNR: 65dBFS
- Typical SFDR: 82dBC @ -1dBFS input (10MHz to 100MHz analog input)
アプリケーション
- Radar and electronic/signal intelligence
- Broadband communications
- High-performance data acquisition
- Low power, high dynamic range ADC interface
- Differential mixer output amplifier
- SAW filter pre/post driver
- Differential Comms-DAC output driver
設計・開発
製品選択
適用されたフィルター