概要
説明
The 5V41235 is a PCIe Gen2/3 compliant spread spectrum capable clock generator. The device has 2 differential HCSL outputs and can be used in communication or embedded systems to substantially reduce electro-magnetic interference (EMI). The spread amount and output frequency are selectable via select pins. The 5V41235 can also supply 25 MHz, 125 MHz and 200 MHz outputs for applications such as Ethernet.
特長
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2 - 0.7V current mode differential HCSL output pairs
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16-pin TSSOP and MLF packages; small board footprint
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Spread-spectrum capable; reduces EMI
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Outputs can be terminated to LVDS; can drive a wider variety of devices
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25 MHz, 125 MHz and 200 MHz output frequencies; TSSOP only
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100MHz and 200MHz output frequencies; MLF package
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OE control pin; greater system power management
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Spread% and frequency pin selection; no software required to configure device
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Industrial temperature range available; supports demanding embedded applications
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Cycle-to-cycle jitter < 100 ps
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Output-to-output skew < 50 ps
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PCIe Gen2 phase jitter < 3.0ps RMS
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PCIe Gen3 phase jitter <1.0ps RMS
製品比較
アプリケーション
設計・開発
製品選択
適用されたフィルター
ビデオ&トレーニング
PCIe Clocking Architectures (Common and Separate)
This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.
Watch the Video Series Below
Video List
