The 9FGV1006 is a member of Renesas' PhiClock™ programmable clock generator family. The 9FGV1006 provides 2 copies of a of a single integer, fractional or spread-spectrum output frequency and one copy of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I²C bits all easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I²C mode. Four unique I²C addresses are available, allowing easy I²C access to multiple components.
Features
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PCIe Gen1–5 compliant
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PCIe Gen5 Common Clock jitter < 83fs RMS
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276fs RMS typical phase jitter at 156.25MHz (12kHz–20MHz)
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2 programmable output pairs plus 1 LVCMOS REF output
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1 integer, fractional or spread-spectrum output frequency per configuration
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1MHz–325MHz output frequency (LVDS or LP-HCSL)
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1MHz–200MHz output frequency (LVCMOS)
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1.8V to 3.3V core VDD
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Individual 1.8V to 3.3V VDDO for each programmable output pair
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Supports HCSL, LVDS and LVCMOS I/O standards
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Supports AC-coupled LVPECL and CML logic – see AN-891
- 3 × 3 mm 16-LGA packages with 50MHz integrated crystal option
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Supported by Timing Commander™ software