Overview

The 9DB108 8-output differential buffer for PCIe Gen 1 is not recommended for new designs. The 9DB803 8-output differential buffer for PCIe Gen 2 is the recommended replacement.

  • Supports tight ppm accuracy clocks for Serial-ATA
  • Spread spectrum modulation tolerant, 0% to -0.5% down spread and ± 0.25% center spread
  • Supports undriven differential output pair in PD# and SRC_STOP# for power management

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models
Diagram of ECAD Models

Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    9DB108BFLF
    circleObsolete
    memory
    view_in_ar
    		SSOP 48 C Yes Tube
    9DB108BFLFT
    circleObsolete
    memory
    view_in_ar
    		SSOP 48 C Yes Reel
    9DB108BGLF
    circleObsolete
    memory
    view_in_ar
    		TSSOP 48 C Yes Tube
    9DB108BGLFT
    circleObsolete
    memory
    view_in_ar
    		TSSOP 48 C Yes Reel
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    Videos & Training

    PCIe Clocking Architectures (Common and Separate)

    This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.

    Watch the Video Series Below

    Video List
    PCIe Clocking Architectures (Common and Separate)
    PCIe Common Clock Architecture and its Impact on Clocking
    PCIe Separate Reference without Spread Clock Architecture
    PCIe Separate Reference Clock With Independent Spread (SRIS) Architecture Overview