概要
説明
The RC19002 is a 2-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19002 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
特長
- LP-HCSL outputs eliminate up to 8 terminated resistors
- PCIe Gen 1–7 compliance
- Drive both source-terminated and double-terminated loads
- Selectable 85Ω and 100Ω output impedance
- Open-drain LOS (Loss-Of-Signal) indication output
- Power down tolerance (PDT)
- Flexible startup sequencing (FSS)
- Automatic clock parking (ACP)
- Dedicated OE# pins to control group output
- 3mm × 3mm 20-VFQFPN package
製品比較
アプリケーション
設計・開発
製品選択
適用されたフィルター
ビデオ&トレーニング
PCIe Gen7 RC19 Family Clock Buffer and MUX Overview
The RC family consists of PCIe Gen7 clock buffer and multiplexer solutions, providing the industry's smallest and most compact footprint.
Video List
