Overview

The 844201I-45 is a PCI Express®TM Clock Generator. The 844201I-45 can synthesize 100MHz or 125MHz reference clock frequencies with a 25MHz crystal. The 844201I-45 has excellent phase jitter performance and is packaged in a small 16-pin VFQFN, making it ideal for use in systems with limited board space.

844201I-45 - Block Diagram
844201I-45 - Pinout
844201I-45 - Block Diagram
844201I-45 - Pinout
  • One differential LVDS output pair
  • Crystal oscillator interface designed for 18pF, 25MHz parallel resonant crystal
  • VCO range: 490MHz - 680MHz
  • RMS phase jitter at 100MHz (12kHz - 20MHz): 0.792ps (typical)
  • RMS phase jitter at 125MHz (12kHz - 20MHz): 0.773ps (typical)
  • Full 3.3V output supply mode
  • PCI Express® (2.5 Gb/s) and Gen 2 (5 Gb/S) jitter compliant
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models
Diagram of ECAD Models

Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    844201BKI-45LF
    circleObsolete
    memory
    view_in_ar
    		VFQFPN 16 I Yes Tray
    844201BKI-45LFT
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    memory
    view_in_ar
    		VFQFPN 16 I Yes Reel
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    Videos & Training

    PCIe Clocking Architectures (Common and Separate)

    This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.

    Watch the Video Series Below

    Video List
    PCIe Clocking Architectures (Common and Separate)
    PCIe Common Clock Architecture and its Impact on Clocking
    PCIe Separate Reference without Spread Clock Architecture
    PCIe Separate Reference Clock With Independent Spread (SRIS) Architecture Overview