RZ/G1M

Very high processing performance with 1.5 GHz dual-core Arm^® Cortex^®-A15 CPUs, with 3D graphics and video codec engine.

RZ/G1M embedded processors are equipped with a dual-core 3D graphics engine (PowerVR SGX544MP2 at 520 MHz), two 32-bit DDR3 memory channels, and they support full high-definition video encoding and decoding. With built-in USB 3.0, PCI Express, and SATA high-speed interfaces, they are ideal for high-end human-machine interface (HMI) applications as well as image identification and authentication. They are fully scalable with the RZ/G1N MPU.

Main Solutions

Key Features:

ITEM	RZ/G1M (R8A77430)
Power Supply Voltage	3.3V/1.8V(For IO), 1.35V(For DDR3L), 1.03V(For Core, SATA, PCI Express and USB3.0)
CPU Core	Arm^® Cortex^®-A15 Dual core
Maximum operating frequency	1.5GHz
Drystone performance	10500 DMIPS
Cache Memory	Primary cache memory: 64 KB (separated 32K instruction/32K data, TLB128 entry) Secondary cache memory: 1 MB (with CoreLink™ Level 2 Cache Controller L2C-310)
External Memory	Direct connection to DDR3L-SDRAM with dedicated bus
	Max. bus frequency：800 MHz
	Data Bus Size : 32-bit x 2 channels
External Expansion	Direct connection to Flash ROM or SRAM
	Data Bus Size : 8/16-bit
	PCI-Express 2.0 (1 lane)
3D Graphics	PowerVR™SGX544MP2
Video functions	Video display interface x 2 channels (1 channel : LVDS, 1 channel : RGB888)
	Video input interface x 3 channels
	Video codec module VCP3
	IP translate module
	Video image processing function (Color transformation, Image enlargement/Image reduction, Filtering)
Audio functions	Sampling rate change x 10 channels
Audio functions	Serial Sound Interface x 10 channels
Storage interfaces	USB 3.0 Host interface x 1 port (wPHY)
	USB 2.0 Host interface x 2 ports (wPHY) )
	SD Host Interface x 3 channels (Support SDXC, UHS-I function)
	Multimedia Card Interface x 1 channel
	Serial ATA Interface x 2 channels
Timer Function	32-bit Timer x 12 channels
Timer Function	PWM Timer x 7 channels
Connectivity functions	I²C Bus Interface × 9 channels
	Serial Communication Interface (SCIF) x 15 channels
	Quad Serial Peripheral Interface (QSPI) x 1 channel (Support boot function)
	Clocked Serial Interface (MSIOF) x 3 channels (Support SPI/IIS）
	Ethernet AVB Controller（IEEE802.1BA, 802.1AS, 802.1Qav and IEEE1722 compliance, GMII/MII Interface, Connectable PHY devices）
	Ethernet Controller (Built-in MAC compliant IEEE802.3u, RMII interface, Connectable PHY devices)
	CAN Interface x 2 channels
Other functions	DMAC in LBSC x 3 channels, SYS-DMAC x 30 channels, Audio-DMAC x 26 channels, Audio (peripheral)-DMAC x 29 channels,
	Interrupt Controller
	Clock Generator (CPG) : Built-in PLL
	On-chip debug function

Pin Count / Memory Size Lineup:

SRAM

Pins Package	831 FCBGA
332KB

Block Diagram:

*Arm, Cortex and CoreLink are registered trademarks or trademarks of Arm Limited.

Resources for Software and Hardware

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e-learning	Information for studying and learning about microcontrollers and microprocessors.
FAQ	Frequently asked questions and useful hints for development.
Forum	A forum and community site to share technical information, questions and opinions with others who use Renesas products.

Boards and Software Solutions

Title	Description
MarketPlace	RZ/G series board, middleware and partner information are provided.

Platform

Title	Description
RZ/G Linux Platform	Renesas offers "RZ/G Linux Platform" as system platform which is systematically organized Linux OS environment.

Partner

Title	Description
Partner Information	This partner list includes Hardware and Software partners.

My Account

My Account

RZ/G1M

Main Solutions

Pin Count / Memory Size Lineup: