Overview

Description

The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.

Features

  • Free-running CLKA and CLKB may be asynchronous or coincident
  • Two independent clocked FIFOs buffering data in opposite directions
  • Mailbox bypass register for each FIFO
  • Programmable Almost-Full and Almost-Empty flags
  • Supports clock frequencies up to 83MHz
  • Fast access times of 8ns
  • Available in 120-pin TQFP package
  • Industrial temperature range (–40C to +85C) is available

Documentation

Document title Document type
Type
Date Date
PDF 262 KB Datasheet
PDF 1.11 MB End Of Life Notice
PDF 86 KB End Of Life Notice
PDF 30 KB End Of Life Notice
PDF 123 KB Guide
PDF 24 KB Product Change Notice
PDF 252 KB Product Change Notice
PDF 164 KB Product Change Notice
PDF 16 KB Product Change Notice
PDF 290 KB Product Change Notice
PDF 80 KB Product Change Notice
PDF 26 KB Product Change Notice
PDF 150 KB Product Change Notice
PDF 65 KB Product Change Notice
PDF 150 KB Product Change Notice
PDF 40 KB Product Change Notice
PDF 274 KB Product Change Notice
PDF 44 KB Product Change Notice
18 items

Design & Development

Software & Tools

Software Downloads

Software title Software type Type Date Date
PDF 1.11 MB End Of Life Notice
PDF 86 KB End Of Life Notice
PDF 30 KB End Of Life Notice
3 items

Models

Models

Title Type Type Date Date
ZIP 10 KB Model - IBIS
TAR 40 KB Model - SPICE
2 items