NOTICE - The following device(s) are recommended alternatives:

The MK1575-01 is a clock recovery Phase-Locked Loop (PLL) designed for clock synthesis and synchronization in cost sensitive applications. The device is optimized to accept a low-frequency reference clock to generate a high-frequency data or graphics pixel clock. External loop filter components allow tailoring of loop frequency response characteristics. For low jitter / phase noise requirements refer to the MK2069 products.

Features

  • Long-term output jitter <2 nsec over 10 ?sec period
  • External PLL clock feedback path enable "zero delay" I/O clock skew configuration
  • Selectable internal feedback divider provides popular telecom and video clock frequencies (see tables below)
  • Can optionally use external feedback divider to generate other output frequencies.
  • Single 3.3 V supply, low-power CMOS
  • Power-down mode and output tri-state (pin OE)
  • Packaged in 16-pin TSSOP
  • Pb (lead) free package
  • Industrial temperature range available

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TSSOP 16 I Yes Tube
Availability
Obsolete TSSOP 16 I Yes Reel
Availability
Obsolete TSSOP 16 C Yes Tube
Availability
Obsolete TSSOP 16 C Yes Reel
Availability

Documentation & Downloads

Title language Type Format File Size Date
Datasheets & Errata
MK1575-01 Datasheet Datasheet PDF 221 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-800 Approved VCXO Crystals Application Note PDF 150 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
Using IDT's Integrated VCXO Products MAN05 Application Note PDF 231 KB
PCNs & PDNs
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PDN# : MM-15-05 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 531 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16 Product Change Notice PDF 663 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB
Other
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB