9DML4493A is a Gen1–5 compliant 4-input, 4-output clock multiplexer. The device supports complex clock architectures like CC, SRIS and SRNS while providing very low additive jitter. This multiplexer supports standard industry signaling such as LVPECL, LVDS, HCSL and LVCMOS. The 9DML4493 also features configurable strap pins, making it ideal for applications where serial bus such as I2C is not available.
For information regarding evaluation boards and material, please contact your local Renesas sales representative.
- PCIe Gen1–5 compliance
- Pin selectable 4:4 mode or dual 2:2 MUX mode
- Input frequency range: 1Hz to 350MHz
- Supports LVPECL, LVDS, HCSL and LVCMOS input reference clocks
- Configuration strap pin option selecting output impedance of 100Ω or 85Ω for board space optimization
- Three pin-selectable output amplitudes per bank
- Flexible power supply voltage of 1.8V, 2.5V, or 3.3V
- -40°C to +85°C operating temperature range
- 5 × 5 mm 32-VFQFPN package; small board footprint
- Easy AC-coupling to other logic families. See application note AN-891.