The 74LVCH16601A 18-bit universal bus transceiver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. All pins can be driven from either 3.3V or 5V devices allowing the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVCH16601A has been designed with a ±24mA output driver which is capable of driving a moderate to heavy load while maintaining speed performance. The 74LVCH16601A has "bus-hold" which eliminates the need for pull-up/down resistors. The 74LVCH16601A operates at -40C to +85C


  • Typical tSK(o) (Output Skew) 250ps
  • ESD > 2000V per MIL-STD-883, Method 3015
  • > 200V using machine model (C = 200pF, R = 0)
  • VCC = 3.3V ± 0.3V, Normal Range
  • VCC = 2.7V to 3.6V, Extended Range
  • CMOS power levels (0.4 uW typ. static)
  • All inputs, outputs, and I/O are 5V tolerant
  • Supports hot insertion
  • Available in 56 pin SSOP package




Design & Development