Overview

Description

The RMLV1616A-U Series is a family of 16-Mbit asynchronous SRAMs organized 1,048,576-word × 16-bit.

The RMLV1616A-U Series has realized higher soft error immunity compared to typical SRAMs with on-chip ECC, archived by Renesas’s unique Advanced LPSRAM technologies. Therefore, it is suitable for battery backup systems.

It is offered in 48pin TSOP (I) or 48-ball fine pitch ball grid array.

Features

  • Ultra-low standby current consumption:
    - ~25°C: 0.5μA (typ.)/3μA (max.)
    - ~85°C: 4.5μA (typ.)/8μA (max.)
  • High speed access time: 45ns/55ns (max.)
  • Higher soft error immunity (< 0.04 FIT/Mb)*1 compared to typical SRAMs with on-chip ECC
  • Single 3V supply: 2.7V to 3.6V
  • Organized 1,048,576-word × 16-bit (48pin TSOP (I) also configurable as 2,097,152-word × 8bit)
  • Easy memory expansion by CS1# and CS2
  • No clocks, No refresh
  • Common data input and output
    - Three state output
  • Directly TTL compatible
    - All inputs and outputs
  • Battery backup operation
  • Available in Pb-free and RoHS applicable package

Note *1. Based on an accelerated test that complies with JEDEC standard JESD89A. Contact us for details.

Applications

Documentation

Title Type Date
PDF330 KB日本語
Datasheet
PDF1.54 MB日本語
Guide
PDF60 KB
Package Outline Drawing

Design & Development

Models

Models

Title Type Date
IBS55 KB
Model - IBIS
IBS55 KB
Model - IBIS