Overview

The MK2308-2 is a low jitter, low skew, high-performance Phase-Lock Loop (PLL) based zero delay buffer for high-speed applications. Based on Renesas' proprietary low jitter PLL techniques, the device provides eight low skew outputs at speeds up to 133.3MHz at 3.3V. The MK2308-2 includes a bank of four outputs running at 1/2X. In the zero delay mode, the rising edge of the input clock is aligned with the rising edges of all eight outputs. Compared to competitive CMOS devices, the MK2308-2 has the lowest jitter.

MK2308-2 - Block Diagram
MK2308-2 - Block Diagram
  • Packaged in a 16-pin SOIC
  • Pb (lead) free package
  • Zero input-output delay
  • Four 1X outputs plus four 1/2X outputs
  • Output-to-output skew is less than 250ps
  • Output clocks up to 133.3MHz at 3.3V
  • Ability to generate 2X the input
  • Full CMOS outputs with 18mA output drive capability at TTL levels at 3.3V
  • Spread Smart™ technology works with spread spectrum clock generators
  • Advanced, low-power, sub-micron CMOS process
  • Operating voltage of 3.3V

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models
Diagram of ECAD Models

Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    MK2308S-2ILF
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    memory
    view_in_ar
    		SOIC 16 I Yes Tube
    MK2308S-2ILFT
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    memory
    view_in_ar
    		SOIC 16 I Yes Reel
    MK2308S-2LF
    circleObsolete
    memory
    view_in_ar
    		SOIC 16 C Yes Tube
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