Overview

Description

The 82V3398 is an integrated, single-chip solution for the Synchronous Equipment Timing Source (SETS) for Stratum 3, 4E, 4, SMC, EECOption1, EEC-Option2 clocks in SONET/SDH/Synchronous Ethernet equipment, DWDM, and wireless base stations. The device consists of a high-quality and configurable DPLL to provide a system clock for node timing synchronization within a SONET/SDH/Synchronous Ethernet network.

Features

  • Integrated single-chip solution for Synchronous Equipment Timing Source, including Stratum 3, 4E, 4, SMC, EEC-Option 1, and EEC-Option 2 clocks
  • Hitless reference switching to minimize DPLL output phase transients
  • Programmable input-to-output phase offset adjustment
  • Provides 6 output clocks from 1Hz (1PPS) to 644.53125MHz
  • Provides 6 input clocks from 1Hz (1PPS) to 625MHz
  • Internal DCO controlled by an external processor for IEEE 1588 clock generation
  • Free-Run, Locked, and Holdover modes
  • Automatic hitless selected input clock switch on clock failure
  • 2kHz, 4kHz, 8kHz, or 1PPS frame sync input, 2kHz, 8kHz, or 1PPS frame sync output
  • Output clocks for BITS, GPS, 3G, GSM, etc.
  • PECL/LVDS and CMOS input/output technologies
  • Master/Slave feature for system protection against single-chip failure

Comparison

Applications

Applications

  • 1 Gigabit Ethernet and 10 Gigabit Ethernet
  • BITS/SSU
  • SMC/SEC (SONET/SDH)
  • DWDM cross-connect and transmission equipment
  • Synchronous Ethernet equipment
  • Central office timing source and distribution
  • Core and access IP switches/routers
  • Gigabit and Terabit IP switches/routers
  • IP and ATM core switches and access equipment
  • Cellular and WLL base station node clocks
  • Broadband and multi-service access equipment

Documentation

Design & Development

Models