The 8P34S2102 is a high-performance, low-power, differential dual 1:2 LVDS Output 1.8V / 2.5V Fanout Buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has two low skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S2102 ideal for those clock distribution applications demanding well-defined performance and repeatability. The device is characterized to operate from a 1.8V / 2.5V power supply. The integrated bias voltage references enable easy interfacing of AC-coupled signals to the device inputs.

Features

  • Dual 1:2 low skew, low additive jitter LVDS fanout buffers
  • Matched AC characteristics across both channels
  • High isolation between channels
  • Low power consumption
  • Both differential CLKA, nCLKA and CLKB, nCLKB inputs accept LVDS, LVPECL and single-ended LVCMOS levels
  • Maximum input clock frequency: 2.0GHz
  • Output amplitudes: 350mV, 500mV (selectable)
  • Output bank skew: 5ps typical
  • Output skew: 30ps typical
  • Low additive phase jitter, RMS: 40fs typical (fREF = 156.25MHz, 12kHz to 20MHz)
  • Full 1.8V / 2.5V supply voltage mode
  • Lead-free (RoHS 6), 16-lead VFQFN packaging
  • -40°C to 85°C (Tc ≤ 105°C) operating temperature range

tuneProduct Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Tape Pin 1 Quad Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 16 I 0 Yes Tray
Availability
Active VFQFPN 16 I 1 Yes Reel
Availability
Active VFQFPN 16 I 2 Yes Reel
Availability

descriptionDocumentation

Title language Type Format File Size Date
Datasheets & Errata
star 8P34S2102 Datasheet Datasheet PDF 558 KB
Application Notes & White Papers
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCNs & PDNs
PCN# : TB1912-02(R1) Convert Shipping Media from Tube or Tray to Cut Reel Product Change Notice PDF 5.71 MB
PCN# : TB1912-02 Convert Shipping Media from Tube or Tray to Cut Reel Product Change Notice PDF 5.61 MB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1809-04 Add Alternate Assembly Location for QFN packages Product Change Notice PDF 36 KB
Other
RF Timing Family Product Overview Overview PDF 331 KB
Clock Distribution Overview 日本語 Overview PDF 217 KB
8P34S21xx-series 1.8V Dual RF Clock / Data Fanout Buffers Product Brief PDF 291 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB

file_downloadDownloads

Title language Type Format File Size Date
Models
8P34S2102 IBIS Model Model - IBIS ZIP 31 KB