Single transmitter (ISL32614E), single receiver (ISL32610E), and transceivers (ISL32602/ISL32603E) designed for low operating voltages.

  • Operate from voltages as low as 1.8V
  • Feature quiescent supply currents (Icc) as low as 80µA
  • Operate at data rates as high as 256kbps (Applications requiring higher data rates can use the ISL32603E or ISL32614E at 460kbps by powering them from a 3.3V supply)

Power critical applications such as remote sensor links and battery-operated security systems benefit from this level of performance.

Product Selector: Standard RS-485/RS-422

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Videos & Training

High-Speed RS-485 Interface Webinar

In this technical webinar, Intersil discusses RS-485 advantages over other high speed standards. With modern high speed data transmission systems aiming for cable lengths close to 1000 ft, bus transceivers with high common-mode capability have become more important than ever.

Transcript

High-Speed RS-485 Transceivers and Applications

This training module focuses on high-speed RS-485 transceivers and applications. This module:

  • Compares RS-485 versus other high-speed interface standards
  • Reviews some of the main important requirements for a high-speed network design
  • Discusses the key parameters of high-speed transceivers

RS-485 Advantages Over Other High-Speed Standards

With modern high-speed data transmission systems aiming for cable lengths close to 1000 ft, bus transceivers with high common-mode capability have become more important than ever.

Here, RS-485 offers advantages over all other high-speed interface standards, such as high differential driver output voltage swing of Vod = ±1.5 V combined with high receiver common-mode input voltage range from Vcm = -7V to +12V.

Some of Intersil’s high-speed transceivers are designed to provide even higher voltage ranges, such as Vod = ± 2.1V and Vcm = ± 25V.

While other high-speed interfaces, such as Ethernet, cope with even higher ground potential differences and their associated common-mode issues through the use of isolation transformers, their implementation raises system design cost significantly.

Another major advantage of RS-485 is that it allows for the design of point-to-point and multipoint applications with more than 150 transceivers connected to one bus segment.

Furthermore, RS-485 data links can be designed for half-duplex operation to save cable cost, or full-duplex operation for minimum latency and increased data throughput.

Unlike Ethernet and USB, which are complete interface standards requiring dedicated high-level software protocols, RS-485 is a basic transceiver specification, commonly labeled as “electrical-only” standard. This makes RS-485 adaptable to any type of high-level software protocols. Thus many interface standards, such as PROFIBUS, Modbus, INTERBUS, etc. utilize RS-485 as their physical layer.

Data Link Configurations

A wide variety of network configuration exist for RS-485. However, for high-speed application in particular, the point-to-point link is probably the most common structure applied.

Single and parallel point-to-point links are applied when high data throughput is needed across long distances.

Full-duplex point-to-point links are used in applications requiring low latency and high data throughput by allowing for simultaneous transmitting and receiving.

Half-duplex point-to-point links are used for low cabling cost, while ensuring high data rates without stringent latency requirements.

Half-duplex multipoint data links are utilized in longer distance networks where multiple nodes are addressed via a single signal-pair. Here data rates are in the lower Mbps range (despite the claim of PROFIBUS for 12Mbps capability).

Full-duplex multipoint networks favor high-speed applications because of removed latency due to simultaneous transmitting and receiving between multiple nodes.

Apply Parallel Termination

Data transmission lines must be terminated when the signal round-trip time (towards the bus end and back to the signal source) is longer than the rise/fall time of the active driver. If unterminated, signal reflections returning to the source will distort the initial driver signal and cause data errors.

Proper termination requires that the energy of the signal propagating along the bus is fully converted into heat through the implementation of termination resistors at both cable ends.

The values of the terminating resistors, RT, should match the characteristic impedance, Zo, of the transmission cable.

Because the RS-485 standard recommends the use of twisted pair cables with a Zo = 120Ω, the value of the termination resistors should also be 120Ω. This termination method is known as parallel termination.

NOTE that the RS-485 standard allows for a wider range of characteristic cable impedances (120Ω ±30Ω) to enable the use of various cables with either lower or higher characteristic impedance, such as CAT-5 cable (Zo = 100Ω) and PROFIBUS cable (Zo = 150Ω).

Avoid AC and Diode Terminations

While AC termination blocks DC currents and thus saves dc power, its RC circuit however often acts as an edge generator causing significant signal over and undershoots.

Another drawback of this termination is that the termination capacitor, CT, contributes to bit-pattern dependent jitter.

In general AC termination is dependent upon the termination line length and does not perform well in environments in multipoint designs where multiple sources are distributed along the line.

Schottky diode termination maintains signal integrity by clamping overshoot and undershoot caused by reflections. No impedance matching is involved and its average power dissipation is smaller than with parallel termination. A major drawback however is the diodes’ clamping action which removes the data links’ wide common-mode capability by clamping just a forward voltage above Vcc and below ground. This makes network operation non-compliant with the RS-485 standard.

Another disadvantage is the diodes’ high peak currents during clamping action, which cause radiated emissions thus making diode termination unsuitable for EMI sensitive applications.

Stub Definition

The connection between a bus transceiver and the main cable link is known as a stub.

A stub represents a piece of unterminated transmission line. Stubs must not be terminated in order to avoid excessive bus loading. Simply imagine a bus with 60 nodes where each stub is terminated with a 120Ω resistor. The total bus load would result in a excessively large load resistance of RL = 120Ω/60 = 2Ω, which would be impossible to drive by any type of differential transceiver.

Instead stubs must be kept below a maximum length to prevent the build-up of signal reflections. The calculation of the maximum stub length is provided on the next slide.

There are however two different methods of connecting bus transceivers with one another.

The first and most commonly applied method is daisy chaining. Here PCB connectors provide connecting ports for an incoming and an outgoing signal pair. On the circuit board itself, both ports are directly connected with one another as well as with the transceiver bus terminals. This method allows for the shortest possible stub length designs and is therefore recommended for high-speed data transmission.

Another method is the connection of bus transceivers to a backbone cable via junction boxes and associated stub cables. While this method allows for the connection of remote nodes, it also requires significantly longer driver transition times and hence lower data rates.

Maximum Stub Length

In order to prevent signal reflections on an unterminated transmission line, such as a stub, its line length must not exceed a maximum length.

Here a typical rule-of-thumb suggests that the signal one-way trip time (the time it takes the signal to propagate from an actively driving node along the stub to the bus cable) should be shorter than 1/4 to 1/10 of the rise/fall time of the active driver.

The equation above, using a factor of 1/10, is used to calculate the various stub lengths for a range of transceivers with different data rates and rise/fall times for the signal velocities of an RS-485 cable and of 120Ω impedance controlled PCB traces.

In order to determine the maximum data rate or minimum bit-time, it is assumed that the driver rise/fall time is around 30% of the bit time: tr = 0.3 · tbit .

With tbit = 1/DR follows • DR (bps) = 0.3/ tr (s).

The table clearly shows that with increasing data rates, and hence shorter driver rise/fall times, the maximum stub lengths reduce proportionally.

Therefore, high-speed applications always require short stub lengths. It is also the reason why daisychaining is the preferred method in multipoint high-speed data links.

Common-mode Voltage Range

Ground potential differences (GPDs) between remote bus nodes exist because bus nodes receive their local supply from different locations in the electrical installation.

The RS-485 standard defines a transceiver’s total common-mode voltage range (VCM) as the sum of the driver output offset (VOC), the ground potential difference (VGPD), and the coupled noise from external sources (Vn) into the cable:

VCM = VOC + VGPD + Vn

The standard specifies this range with 7V above Vcc (5V + 7V = 12V) and 7V below GND (0V -7V = -7V), thus yielding a VCM range from -7V to +12V.

The standard also demands reliable data transmission for a maximum ground potential difference of VGPD = ±7V. Assuming a symmetrical 5V driver design, the driver output common-mode will be VOC = Vcc/2 = 2.5V. The sum of these two common-mode voltages then provides sufficient head room for any coupled noise of up to Vn = ±2.5V to yield the maximum common-mode voltage range.

Example using the equation above:

VCM+ = 2.5V + 7V +2.5V = 12V and VCM-= 2.5V + (-7V) + (-2.5V) = -7V

GPDs of ±7V and coupled noise of ±2.5V represent huge values for a well balanced data link. The ability to operate reliably under these challenging conditions has made RS-485 the industrial workhorse amongst interfaces operating in harsh environments.

NOTE the ground potential difference between remote nodes is an AC voltage that swings at the 3rd harmonic of the 60Hz mains supply.

Cable Length versus Data Rate

This slide shows the transmission line model of a short cable element with its linear and reactive components. Below follows the cable length versus data rate characteristic.

At low data rates the maximum cable length is determined by the dc resistance of the cable. When the cable resistance approaches the value of the termination resistor, the voltage divider action between the resistances diminishes the signal by -6dB. For a 24AWG, 120Ω, UTP cable this occurs at around 1200m or 4,000ft.

The roll-off section presents the transition from low to high data rates. Here the reactive components of the transmission line kick in making the losses of the transmission linefrequency dependent. Thus with increasing data rate the cable length must be reduced.

At high data rates the cable lengths become very short and are typically determined by a jitter budget. The diagram above shows that for a data rate of 20Mbps and 5% jitter, the maximum cable length is about 250ft (75m). However, when allowing for up to 20% jitter, the cable length can almost be doubled to around 450ft (137m).

Jitter: Variation with Cable Length

Jitter is caused by changes in transition timing due to bit patterns and cable capacitance which in turn depends on the cable length and cable type.

Jitter is evaluated via an “Eye Diagram”. Here a PRBS (Pseudo Random Bit Stream) generator sends gazillions of varying bit patterns across a data link. The charge and discharge characteristics of the cable capacitance are recorded for each bit pattern and then superimposed onto one another yielding the eye diagram.

The jitter budget is commonly given in percent and defined as: Jitter (%) = 100 · Jitter width (s) / Bit width (s) with typical Jitter goals ranging from 10% to 20%.

Example:

A transmission cable presents a capacitive load to the driver output. Thus, long sequences of 1s or 0s will charge or discharge this capacitance to a higher voltage than just a single 1 or 0 bit. Data errors can occur when a single bit of a certain polarity follows a sequence of consecutive bits of opposite polarity. Depending on the cable capacitance the single bit might not be able to charge or discharge the capacitance sufficiently in order for the bus voltage to cross the receiver input threshold level. When this happens, the receiver input will not be triggered and the information of the single bit status is lost.

Because cable capacitance increases with cable length, for a given data rate the signal jitter and bit error rate will increase. There are two options to reduce jitter and the associated bit error rate:

1) Either by reducing the data rate or cable length,

2) Or by encoding the data stream such that long sequences of 1s and 0s are converted into a clock-like signal, which charges and discharges the cable capacitance more equally and therefore generating more consistent signal amplitudes.

Data Encoding

Encoding the data stream removes the large DC content of long bit sequences of 1s and 0s by introducing more transitions into the data stream in order to charge and discharge the cable capacitance more equally and generating more consistent signal amplitudes.

Various coding schemes exist such as

  • RZ (return-to-zero),
  • Manchester coding,
  • And 8b/10b coding.

One drawback of Manchester coding is its inefficient use of bandwidth because the clock frequency used to encode the data signal must be twice as high as the data rate, which presents a 100% increase in required bandwidth.

Another, often preferred coding scheme in high-speed data transmission is 8/10 bit coding with significantly higher coding efficiency requiring a significant lesser increase in bandwidth.

High-Speed Application Examples

This slide shows a small excerpt of the many combinations of high-speed applications and their applied bus configurations. By no means does it imply that all shaft encoders will be utilizing the same synchronous half-duplex data link. The same application could be using an asynchronous full-or half-duplex link.

NOTE that in high-speed point-to-point data links it is common to supply the entire data link from a single power supply source, while the nodes of a multipoint bus often receive their supply locally.

One interesting fact is that the timing of a high-speed transceiver is not always determined by the data rate required for a certain application.

In PROFIBUS for example the maximum data rate is specified with 12Mbps, although the lion share of applications operates in the range from 200kbps to 2Mbps.

Despite this rather low data rate requirement, the PROFIBUS inventors have demanded that new transceiver designs are capable of supporting data rates of up to 40Mbps, simply to ensure precise driver and receiver switching.

Pulse Skew and Part-to-Part Skew

Two important timing specification are pulse skew and part-to-part skew.

Pulse skew is the magnitude of the difference of rising edge propagation delay to falling edge propagation delay: tSKEW = |tPLH -tPHL|.
It determines the maximum possible pulse distortion that is from a single-ended input pulse to a differential output pulse for a driver, and from a differential input pulse to a single-ended output pulse for a receiver.

Part-to-Part skew is the skew between any two units tested with identical test conditions (Temperature, VCC, etc.).
This parameter is especially important in synchronous applications, where the clock and data signals come from different transceivers requiring a low part-to-part skew in order to maintain the clock-to-data timing.

Note because of the precise switching characteristics of Intersil transceivers due to very low process variations, Intersil is the only vendor of high-speed RS-485 transceivers that specifies a maximum part-to-part skew.

ESD Immunity: IEC vs. HBM

There are two ratings of electrostatic discharges (ESD) caused by human contact: component-level ESD and system-level ESD.

Component level ESD immunity rating applies to the manufacturing environment where component assembly, packaging and shipping are performed in an ESD controlled environment through the application of ESD protective gear. Here, the ESD stress upon a component is significantly reduced and an ESD generator model, known as the human body model (HBM), is used to simulate a charged person’s discharge through component or device under test (DUT) to ground.

System level ESD immunity rating applies to the uncontrolled end-user environment where a charged person can subject a system to much higher voltages by touching screw terminals when connecting or disconnecting cables. Here, the ESD generator model is specified by the IEC 61000-4-2 standard that replicates a charged person discharging via a metal object, such as a screw driver, into a grounded electrical system.

ESD protection structures designed for IEC61000-4-2 can often tolerate HBM test voltages of up to 2.75-times their IEC test voltage. An ESD structure designed for 8kV IEC contact discharge should thus be able to withstand an HBM contact discharge of up to 22kV.

The opposite however, that HBM-ESD structures can cope with large IEC-ESD strikes, is unlikely because HBM structures with response times of up to 10ns and significantly lower peak currents are too slow to catch the short front time (< 1ns) of an IEC ESD strike and too weak to withstand its high peak current.

All Intersil high-speed transceivers are rated for the more stringent IEC-ESD requirements.

Ultra-High Speed RS-485

With data rates of 40Mbps to 100Mbps, these devices can handle the fastest of applications.

Here the ISL3159E has been designed particularly for PROFIBUS applications in factory automation where dedicated bus transceivers must provide:

  • High differential output voltage of VOD = 2.1V
  • Data rate of up to 40Mbps
  • Differential input capacitance of CIN = 10pF
  • Fractional unit load of nUL =1/5 (or 160 transceivers per bus segment)

With 3.3V and 5V supply versions and many of the enhanced features we covered earlier, you are assured of finding a fit. Note that we have added an even smaller package option, a 3mm x 3mm DFN that is another 45% smaller than the MSOP.

One of the more interesting applications for such small packages are shaft encoders in motor controls where stringent space-saving requirements aim for ultra-small form factor designs.