Overview

The 8V41N010 is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors. This high-performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks, and the clocks for both the Gigabit Ethernet MAC and PHY. The output frequencies are generated from a 25MHz external input source or an external 25MHz parallel resonant crystal. The industrial temperature range of the 8V41N010 supports telecommunication, networking, and storage requirements.

8V41N010 - Block Diagram
8V41N010 - Pin Assignment
8V41N010 - Block Diagram
8V41N010 - Pin Assignment
  • Eight selectable 100MHz and 156.25MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels
  • One single-ended QF LVCMOS/LVTTL clock output at 50MHz
  • Selectable external crystal or differential (single-ended) input source
  • Crystal oscillator interface designed for 25MHz, parallel resonant crystal
  • Differential CLK, nCLK input pair that can accept: LVPECL, LVDS, LVHSTL, and HCSL input levels
  • Internal resistor bias on nCLK pin allows the user to drive CLK input with external single-ended (LVCMOS/LVTTL) input levels
  • Full 3.3V supply mode
  • -40 °C to 85 °C ambient operating temperature
  • Lead-free (RoHS 6) packaging

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

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Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    8V41N010NLGI
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    		VFQFPN 72 I Yes Tray
    8V41N010NLGI8
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