Overview
Description
The IDT5V80001 is a high performance clock interface for use in MOST® (Media Oriented Systems Transport) enabled systems. It can be used in two modes: generating a master clock for the ring, or performing clock/data recovery in a slave node.
Features
- Packaged in 20-pin TSSOP
- -40 to +105°C temperature range
- Compliant to AEC Q100
- Operating voltage of 3.3 V
- 5 volt tolerant input for FOT
- Low jitter generation
- Power-down tri-state mode
- Advanced, low-power CMOS process
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.