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Very high processing performance with 1.5 GHz dual-core Arm® Cortex®-A15 CPUs, with 3D graphics and video codec engine.


RZ/G1N embedded processors are equipped with a dual-core 3D graphics engine (PowerVR SGX544MP2 at 312 MHz), a 32-bit DDR3 memory bus, and they support full high-definition video encoding and decoding. With built-in USB 3.0, PCI Express, or SATA high-speed interfaces, they are ideal for high-end human-machine interface (HMI) applications as well as image identification and authentication. They are fully scalable with the RZ/G1M MPU.



Product Brochure and Flyer

RZ/G1 Brochure

Key Features:



Part Name R8A77440

Power supply voltage

3.3 V/1.8 V (IO), 1.35 V (DDR3L), 1.03 V (Core, SATA, PCI Express, USB 3.0)

CPU core

Arm® Cortex®-A15 dual core

Maximum operating frequency

1.5 GHz

Processing performance

10500 DMIPS

Cache memory

L1 instruction cache: 32 KB

L1 data cache: 32 KB

L2 cache: 1 MB

External memory

Direct connection to DDR3L-SDRAM with dedicated bus

Maximum operating frequency: 800 MHz

Data bus width: 32 bits x 1 channel

External expansion

Direct connection to Flash ROM or SRAM

Data bus width: 8 or 16 bits

PCI Express 2.0 (1 lane)

3D graphics

PowerVR™ SGX544MP2

Video functions

Video display interface x 2 channels

(1 channel: LVDS, 1 channel: RGB888)

Video input interface x 3 channels

VCP3 video codec module

IP conversion module

Video image processing functions

(color conversion, image enlargement/reduction, filtering)

Audio functions

Sampling rate converter x 10 channels

Serial sound interface x 10 channels


USB 3.0 host interface x 1 port (wPHY)

USB 2.0 host interface x 2 ports (wPHY)

SD host interface x 3 channels

(supports SDXC and UHS-I)

Multimedia card interface x 1 channel

Serial ATA interface x 1 channel

Other peripheral functions

DMAC in LBSC: 3 channels

SYS-DMAC: 30 channels

Audio-DMAC: 26 channels

Audio (peripheral)-DMAC: 29 channels

32-bit timer x 12 channels

PWM timer x 7 channels

I²C bus interface x 9 channels

Serial communication interface (SCIF) x 15 channels

Quad serial peripheral interface (QSPI) x 1 channel (supports boot function)

Clock-synchronized serial interface (MSIOF) x 3 channels (supports SPI/IIS)

Ethernet AVB controller (IEEE 802.1BA, 802.1AS, 802.1Qav, and IEEE 1722 compliance, GMII/MII interface, connectable with PHY devices)

Ethernet controller (built-in IEEE802.3u-compliant MAC, RMII interface, connectable with PHY devices)

Controller area network (CAN) interface x 2 channels

Interrupt controller (INTC)

Clock pulse generator (CPG) with built-in PLL

On-chip debugging

*Arm and Cortex are registered trademarks of Arm Limited.
All names of other products or services mentioned on this page are trademarks or registered trademarks of their respective owners.


Pin count /Memory size Lineup:



Block Diagram:

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RZ/G Linux Platform

Renesas offers "RZ/G Linux Platform" as system platform which is systematically organized Linux OS environment.



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