Evaluation Kit for 9FGV1001 Programmable PhiClock™ Generator
This is the evaluation board for the 9FGV1001 programmable PhiClockTM generator. It provides a convenient way of configuring and programming the blank parts for the...
The 9FGV1001 is a member of Renesas' PhiClock™ programmable clock generator family. The 9FGV1001 provides four non-spread-spectrum copies of a single output frequency and two copies of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I²C bits allow easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I²C mode. Four unique I²C addresses are available, allowing easy I²C access to multiple components.
This is the evaluation board for the 9FGV1001 programmable PhiClockTM generator. It provides a convenient way of configuring and programming the blank parts for the...
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Output Type |
Output Freq Range (MHz) |
Supply Voltage (V) |
Xtal Freq (MHz) |
Carrier Type |
Moisture Sensitivity Level (MSL) |
Price (USD) | 1ku |
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Part Number | ||||||||
9FGV1001C001NBGI circleActive Samples Available
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LP-HCSL | 50, 100, 125, 156.25 | 3.3 | 25 | Tray | 1 | 3.518 | Get Samples, |
LP-HCSL | 50, 100, 125, 156.25 | 3.3 | 25 | Reel | 1 | |||
9FGV1001C002NBGI circleActive Samples Available |
LP-HCSL | 50, 100, 125, 156.25 | 1.8 | 25 | Tray | 1 | Get Samples, | |
LP-HCSL | 50, 100, 125, 156.25 | 1.8 | 25 | Reel | 1 | |||
9FGV1001C011NBGI circleActive Samples Available |
LP-HCSL | 156.25, 161.1328125, 312.5, 322.265625 | 3.3 | 39.0625 | Tray | 1 | Get Samples, | |
LP-HCSL | 156.25, 161.1328125, 312.5, 322.265625 | 3.3 | 39.0625 | Reel | 1 | |||
9FGV1001C012NBGI circleActive Samples Available |
LP-HCSL | 156.25, 161.1328125, 312.5, 322.265625 | 1.8 | 39.0625 | Tray | 1 | Get Samples, | |
LP-HCSL | 156.25, 161.1328125, 312.5, 322.265625 | 1.8 | 39.0625 | Reel | 1 | |||
9FGV1001CQ505LTGI circleActive Samples Available
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LP-HCSL | 50, 100, 125, 156.25 | 3.3 | 50 | Tray | 3 | 4.591 | Get Samples, |
LP-HCSL | 50, 100, 125, 156.25 | 3.3 | 50 | Reel | 3 | |||
9FGV1001CQ506LTGI circleActive Samples Available
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LP-HCSL | 50, 100, 125, 156.25 | 1.8 | 50 | Tray | 3 | 4.591 | Get Samples, |
LP-HCSL | 50, 100, 125, 156.25 | 1.8 | 50 | Reel | 3 |
Ron Wade, chief PCIe system architect explains the fundamental difference in reference clock jitter budgets between the first three generations of the specification and those of Gen4 and Gen5 which raise new challenges for designers.
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