概要

The MK2308-1H is a low phase noise, high-speed PLL-based, 8-output, low skew zero delay buffer. Based on Renesas' proprietary low jitter Phase-Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 133MHz at 3.3V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin.

MK2308-1H - Block Diagram
MK2308-1H - Pinout
MK2308-1H - Block Diagram
MK2308-1H - Pinout
  • Clock outputs from 10MHz to 133MHz
  • Zero input-output delay
  • Eight low-skew (< 200 ps) outputs
  • Device-to-device skew < 700ps
  • Full CMOS outputs with 25mA output drive capability at TTL levels
  • 5V tolerant FBIN and CLKIN pins
  • Tri-state mode for board-level testing
  • Advanced, low-power, sub-micron CMOS process
  • Operating voltage of 3.3V
  • Industrial temperature range available
  • Packaged in 16-pin SOIC and TSSOP packages
  • Pb (lead) free package
  • Industrial and commercial temp operation

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    MK2308G-1HILF
    circle廃止品
    memory
    view_in_ar
    		TSSOP 16 I Yes Tube
    MK2308G-1HILFTR
    circle廃止品
    memory
    view_in_ar
    		TSSOP 16 I Yes Reel
    MK2308G-1HLF
    circle廃止品
    memory
    view_in_ar
    		TSSOP 16 C Yes Tube
    MK2308G-1HLFTR
    circle廃止品
    memory
    view_in_ar
    		TSSOP 16 C Yes Reel
    MK2308S-1HLF
    circle廃止品
    memory
    view_in_ar
    		SOIC 16 C Yes Tube
    MK2308S-1HLFTR
    circle廃止品
    memory
    view_in_ar
    		SOIC 16 C Yes Reel
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