概要

説明

The SLG46580, SLG46582, and SLG46583 are small, low power components commonly used to integrate mixed-signal functions under control of an asynchronous state machine. The user creates the circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macro cells of the SLG46580, SLG46582, and SLG46583. This highly versatile device allows a wide variety of functions and control logic to be designed within a very small, low power monolithic integrated circuit.

特長

  • Programmable Asynchronous State Machine
  • Logic & Mixed Signal Circuits
  • Highly Versatile Macrocells
  • Read Back Protection (Read Lock)
  • Four 150 mA LDO Regulators (SLG46580)
  • Two 300 mA LDO Regulators (SLG46582)
  • One 600 mA LDO Regulators (SLG46583)
  • I2C Interface
  • 2.5 V (±8%) to 5 V (±10%) Supply
  • Operating Temperature Range: -40°C to 85°C
  • RoHS Compliant / Halogen-Free

Macrocells Overview

  • Four Analog Comparators (ACMP);
  • Voltage Reference (Vref) for ACMPs;
  • Analog Temperature Sensor;
  • Fifteen Combination Function Macrocells:
    • Three Selectable DFF/Latch or 2-bit LUTs;
    • Six Selectable DFF/Latch or 3-bit LUTs;
    • One Selectable Pipe Delay or Ripple Counter or 3-bit LUT;
    • Five 8-bit delays/counters or 3-bit LUTs;
  • Combinatorial Logic:
    • One 4-bit LUT with two outputs;
  • Asynchronous State Machine:
    • Eight States;
    • Flexible input logic from state transitions;
  • Real Time Clock (RTC) Binary Counter;
  • Four Tri-Mode 150 mA LDO Regulators (for SLG46580):
    • High Power Mode (HP Mode): 150 mA output with Quiescent Current at ~80 μA;
    • Low Power Mode (LP Mode): 100 μA output with Quiescent Current at ~5 μA;
    • Bypass Mode: Acts like a load switch;
  • Two Tri-Mode 300 mA LDO Regulators (for SLG46582):
    • High Power Mode (HP Mode): 300 mA output with Quiescent Current at ~80 μA;
    • Low Power Mode (LP Mode): 200 μA output with Quiescent Current at ~5 μA;
    • Bypass Mode: Acts like a load switch;
  • One Tri-Mode 600 mA LDO Regulators (for SLG46583):
    • High Power Mode (HP Mode): 600 mA output with Quiescent Current at ~60 μA;
    • Low Power Mode (LP Mode): 400 μA output with Quiescent Current at ~5 μA;
    • Bypass Mode: Acts like a load switch;
  • Serial Communications:
    • I2C Slave Protocol Interface;
  • Programmable Delay with Edge Detector Output;
  • Additional Logic Functions:
    • 2 Deglitch Filters with Edge Detectors;
  • Two Oscillators (OSC):
    • Configurable 25 kHz/2 MHz;
    • 2 kHz Low Power Oscillator;
  • Eight Byte RAM + OTP User Memory:
    • RAM Memory space that is readable and writable via I2C;
    • User defined initial values transferred from OTP;
  • POR.

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