The 9FGV0631 is a member of IDT's SOC-Friendly 1.8 V Very-Low-Power PCIe clock family. The device has 6 output enables for clock management, 2 different spread spectrum levels in addition to spread off and 2 selectable SMBus addresses.
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Pkg. Type |
Lead Count (#) |
Temp. Grade |
Pb (Lead) Free |
Carrier Type |
Buy / Sample |
|
---|---|---|---|---|---|---|
Part Number | ||||||
VFQFPN | 40 | I | Yes | Tray | ||
VFQFPN | 40 | I | Yes | Reel | ||
VFQFPN | 40 | C | Yes | Tray | ||
VFQFPN | 40 | C | Yes | Reel |
IDT’s chief PCIe system architect explains the fundamental difference in reference clock jitter budgets between the first three generations of the specification and those of Gen4 and Gen5 which raise new challenges for designers.