概要

説明

The ADC1413D125HN is a dual-channel 14-bit analog-to-digital converter (ADC) optimized for high dynamic performances and low power at sample rates of 125Msps. Pipelined architecture and output error correction ensure the ADC1413D125HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3V source for analog and a 1.8V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD204A standard. An integrated serial peripheral interface (SPI) allows the user to easily configure the ADC. A set of IC configurations is also available via the binary level control pins taken, which are used at power-up.

特長

  • 2 configurable serial outputs
  • 3.3V, 1.8V single supplies
  • Compliant with JESD204A serial transmission standard
  • Dual channel 14-bit pipelined ADC core
  • Duty cycle stabilizer
  • Flexible input voltage range: 1V (p-p) to 2V (p-p) with 6dB programmable fine gain
  • High IF capability
  • Input bandwidth, 600MHz
  • Offset binary, 2s complement, gray code
  • Power dissipation, 995mW at 80Msps
  • Power-down and Sleep modes
  • Sample rate up to 125Msps
  • SFDR, 90dBc
  • SNR, 73dB
  • SPI interface

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データシート PDF 660 KB
EOL通知 PDF 528 KB
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