NOTICE - The following device(s) are recommended alternatives:

The 813078I is a member of the family of high performance clock solutions from IDT. The 813078I a PLL based synchronous clock solution that is optimized for wireless infrastructure equipment where frequency translation and jitter attenuation is needed. The device contains two internal PLL stages that are cascaded in series. The first PLL stage attenuates the reference clock jitter by using an internal or external VCXO circuit. The internal VCXO requires the connection of an external inexpensive pullable crystal (XTAL) to the 813078I. This first PLL stage (VCXO PLL) uses external passive loop filter components which are used to optimize the PLL loop bandwidth and damping characteristics for the given application. The output of the first stage VCXO PLL is a stable and jitter-tolerant 30.72MHz reference input for the second PLL stage. The second PLL stage provides frequency translation by multiplying the output of the first stage up to 491.52MHz or 614.4MHz. The low phase noise characteristics of the VCXO-PLL clock signal is maintained by the internal FemtoClock® PLL, which requires no external components or complex programming. Two independently configurable frequency dividers translate the internal VCO signal to the desired output frequencies. All frequency translation ratios are set by device configuration pins. Supported input reference clock frequencies: 10MHz, 12.8MHz, 15MHz, 15.36MHz, 20MHz, 30.72MHz, 61.44MHz, and 122.88MHz Supported output clock frequencies: 30.72MHz, 38.4MHz, 61.44MHz, 76.8MHz, 122.88MHz, 153.6MHz, 245.76MHz, 491.52MHz, and 614.4MHz


  • Nine outputs, organized in three independent output banks with differential LVPECL and single-ended outputs
  • One differential input clock can accept the following differential input levels: LVDS, LVPECL, LVHSTL
  • One single-ended clock input
  • Frequency generation optimized for wireless infrastructure
  • Attenuates the phase jitter of the input clock signal by using low-cost pullable fundamental mode crystal (XTAL)
  • Internal Femtoclock frequency multiplier stage eliminates the need for an expensive external high frequency VCXO
  • LVCMOS levels for all control I/O
  • RMS phase jitter @ 122.88MHz, using a 30.72MHz crystal (12kHz to 20MHz): 1.1ps rms (typical)
  • RMS phase jitter @ 61.44MHz, using a 30.72MHz crystal (12kHz to 20MHz): 0.97ps rms (typical)
  • VCXO PLL bandwidth can be optimized for jitter attenuation and reference frequency tracking using external loop filter components
  • PLL fast-lock control
  • PLL lock detect output
  • Absolute pull range is +/-50 ppm
  • Full 3.3V supply voltage
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TQFP 64 I Yes Tray
Obsolete TQFP 64 I Yes Reel

Documentation & Downloads

Title language Type Format File Size Date
Datasheets & Errata
ICS813078I Datasheet Datasheet PDF 665 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-841 Pullable Crystal Selection and VCXO Tuning Application Note PDF 334 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-849 Loop Filter Component Selection for VCXO Based PLLs Application Note PDF 218 KB
AN-848 VCXO - Crystal Selection Application Note PDF 222 KB
AN-847 VCXO - Absolute Pull Range Application Note PDF 155 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PDN# : CQ-15-01 (R1) Quarter PDN for Declined Market Product Discontinuation Notice PDF 550 KB
PDN# : CQ-15-01 Quarter PDN for Declined Market Product Discontinuation Notice PDF 547 KB
PCN# : TB1405-01 New Carrier Tape and Quantity per Reel Product Change Notice PDF 788 KB
813078I IBIS Model - IBIS ZIP 76 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB