ISL70003SEH Rad Hard Sync Buck Regulator

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Video Transcript

Hello, my name is Oscar Mansilla, an applications engineer with Intersil's high rel and space product line group. Do you need a versatile solution that works off 12 rails and is rated for space applications? If so, then the ISL70003SEH is the part for you. It works from 3V to 13.2V, and has a load capability of up to 6A.

The ISL70003 has enhanced power management features, such as increased light load efficiency through diode emulation and phase dropping, an output current monitor through the IMON pin, and supports DDR memory power solutions.

One of the other enhancements to the ISL70003 is the ability to be a power solution for DDR memory applications. The ISL70003 could be used as an independent architecture implementation to power DDR, which means that both VDDQ and VTT rails are derived from the main power source. VTT is regulated by the ISL70003. VDDQ can be any of the Intersil rad hard point to load regulators, and this gives the flexibility to modify VDDQ based on load demands. The image here shows an independent architecture to power DDR memory.

The ISL70003SEH supports DDR marry power solutions. Some of the enhancements that it has is a buffer amplifier to generate the VREF voltage, an error amplifier that is completely pinned out to provide tracking, and it has the ability to sync 3A of load. This simplified schematic helps visualize the necessary connections to implement the ISL70003 as the determination regulator. As you can see here, we have the buffer amplifier to generate the VREF voltage. We also have the VDDQ R over R divider to generate the tracking voltage into the error amplifier.

The ISL70003SEH also has excellent single event transient performance, at an LET of 86.4, with a guarantee of less than 3% output voltage deviation.

The ISL70003SEH is available in two different packages, the bare ceramic package, and the heat sink package. A benefit from the heat sink package is that you have a better thermal path to release the heat out of the IC. The figure on the left here shows the heat sink package mounted on the evaluation board, and it shows a peak temperature of 59.1 °C at a full load of 6A. The thermal image on the right shows the bare ceramic package in the same conditions, at a peak temperature of 84.1 °C. A delta of approximately 24 °C could be expected between the heat sink package and the bare ceramic package.

We have a complete list of documentation, including radiation reports and datasheets, and the ability to order eval boards. For more information on the ISL70003SEH and to order eval boards, visit the ISL70003SEH product page.