The R1Q#A7236 is a 2, 097, 152-word by 36-bit and the R1Q#A7218 is a 4, 194, 304-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable for applications which require synchronous operation, High-Speed, low voltage, high density and wide bit configuration. These products are packaged in 165-pin plastic FBGA package.


  • Power Supply · 1.8 V for core (VDD), 1.4 V to VDD for I/O (VDDQ)
  • Clock · Fast clock cycle time for high bandwidth · Two input clocks (K and /K) for precise DDR timing at clock rising edges only · Two output echo clocks (CQ and /CQ) simplify data capture in high-speed systems · Clock-stop capability with μs restart
  • I/O · Common data input/output bus · Pipelined double data rate operation · HSTL I/O · User programmable output impedance · DLL/PLL circuitry for wide output data valid window and future frequency scaling · Data valid pin (QVLD) to indicate valid data on the output
  • Function · Two-tick burst for low DDR transaction size · Internally self-timed write control · Simple control logic for easy depth expansion · JTAG 1149.1 compatible test access port
  • Package · 165 FBGA package (13 x 15 x 1.4 mm) · RoHS Compliance Level = 6/6




Type Title Date
Datasheet PDF 746 KB
Guide PDF 471 KB 日本語
Product Change Notice PDF 4.86 MB 日本語
Brochure PDF 1.79 MB
Product Change Notice PDF 3.74 MB 日本語
Product Change Notice PDF 1.46 MB 日本語
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Design & Development