The DAC1408D650 is a high-speed 14-bit dual channel Digital-to-Analog Converter (DAC) with selectable 2x, 4x or 8x interpolating filters optimized for multi-carrier WCDMA transmitters. Because of its digital on-chip modulation, the DAC1408D650 allows the complex pattern provided through lane 0, lane 1, lane 2 and lane 3, to be converted from baseband to IF. The mixing frequency is adjusted via a Serial Peripheral Interface (SPI) with a 32-bit Numerically Controlled Oscillator (NCO) and the phase is controlled by a 16-bit register. The DAC1408D650 also includes a 2x, 4x or 8x clock multiplier which provides the appropriate internal clocks and an internal regulation to adjust the output full-scale current.


  • 1.8 V and 3.3 V power supplies
  • 32-bit programmable NCO frequency
  • 650 Msps maximum update rate
  • ACPR: 71 dBc
  • two carriers WCDMA
  • fs = 640 Msps
  • fo = 133 MHz
  • Differential CML receiver with embedded termination
  • Differential scalable output current from 1.6 mA to 22 mA
  • Dual 14-bit resolution
  • Embedded complex modulator
  • External analog offset control (10-bit auxiliary DACs)
  • Four JESD204A serial input lanes
  • Fully compatible SPI port
  • IMD3: 80 dBc
  • fs = 640 Msps
  • fo = 140 MHz
  • Industrial temperature range from -40°C to +85°C
  • Input data rate up to 312.5 Msps
  • Integrated PLL can be bypassed
  • Internal digital offset control
  • Inverse (sin x) / x function
  • LMF = 421 or LMF = 211 support
  • LVDS compatible clock inputs
  • On-chip 1.29 V reference
  • Power-down mode and Sleep modes
  • Selectable 2x, 4x or 8x interpolation filters
  • Synchronization of multiple DAC outputs
  • 2's complement or binary offset data format
  • Typical 1.26 W power dissipation at 4x interpolation, PLL off and 640 Msps
  • Very low noise cap free integrated PLL




Type Title Date
Datasheet PDF 684 KB
End Of Life Notice PDF 994 KB
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