概要

Description

5P35023はVersaClock®プログラマブルクロックジェネレータで、低消費電力、消費者用、高性能 PCI Expressアプリケーション向けに設計されています。 5P35023は3つのPLLアーキテクチャ設計で、各PLLは個別にプログラム可能で、最大5つのユニークな周波数出力を可能にします。5P35023は、PPS(Proactive Power Saving)、PPB(Performance-Power Balancing)、ORT(Overshot Reduction Technology)、超低電力DCOなどのユニークな機能を内蔵しています。 OTPメモリを内蔵しているため、電源投入後にプログラミングをせずにデバイスに設定を保存し、その後I2Cインタフェースから再度5P35023をプログラミングすることが可能です。
 
5P35023はプログラマブルなVCOとPLLソースの選択により、アプリケーションの要件に基づいた電力性能の最適化を可能にします。 また、LVCMOS、LVPECL、LVDS、LPHCSLに対応した3つのシングルエンド出力と2組の差動出力に対応しています。 システムRTCのリファレンスクロックとして、消費電流5μA以下の32.768kHzのLow Powerクロックをサポートします。
 

特長

  • OE、PD#、PPS、DFCの制御機能としてOEピンの機能を設定可能
  • PLL帯域幅の設定可能/ジッタピーキングの最小化
  • PPS:エンドデバイスのパワーダウン・モード時に電力を節約するプロアクティブ省電力機能
  • PPB:Performance- Power Balancing機能により、必要な性能に応じた最小限の電力消費を実現
  • DFC:Dynamic Frequency Control機能により、最大4つの異なる周波数をダイナミックに切り替え可能
  • スペクトラム拡散クロックに対応し、システムEMIの低減を実現
  • I2Cインタフェース
  • 水晶振動器の入力にも対応
  • AEC-Q100準拠、グレード2(-40℃〜+105℃)バージョンで利用可能

製品比較

5P35023 5L35021 5L35023 5P35021
Outputs (#) 7 5 7 5
Output Type LP-HCSL, LVCMOS, LVDS, LVPECL LP-HCSL, LVCMOS LP-HCSL, LVCMOS LP-HCSL, LVCMOS, LVDS, LVPECL
Core Voltage (V) 3.3 1.8 1.8 3.3
Output Voltage (V) 1.8, 2.5, 3.3 1.8 1.8 1.8, 2.5, 3.3
Pkg. Dimensions (mm) 4.0 x 4.0 x 0.9 3.0 x 3.0 x 1.0 4.0 x 4.0 x 0.9 3.0 x 3.0 x 1.0
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VersaClock 3S Low Power Programmable Clock Generators Review and Demonstration

An overview of IDT's VersaClock 3S programmable clock generators. The devices deliver innovative power-saving features while saving board space by eliminating the need for multiple discrete timing components. Delivering  low power and low jitter scalability, the VersaClock 3S devices meet requirements for widely used standards including PCI Express® Gen 1/2/3 and are ideal for consumer, industrial, computing and automotive applications.

The main features include (and are described in the video): Proactive Power Saving, Performance-Power Balancing, Dynamic Frequency Control, and Overshoot Reduction Technology.

The VersaClock 3S 5P35023 has three single-ended LVCMOS outputs and two differential outputs that support LVPECL, LVDS, LP-HCSL, and single-ended LVCMOS. The 5P35021 has one single-ended LVCMOS output and two differential outputs. Both versions feature a low-power 32.768 KHz clock output with less than 2 μA current consumption for use as a system RTC reference clock.

The VersaClock 3S is complemented by an evaluation board and USB programmer board. IDT's Timing Commander software is used to program the device. A quick overview and demonstration is shown in the video.

For more information about IDT's VersaClock programmable clock generators, visit http://www.IDT.com/products/clocks-timing/versaclock-programmable-clocks.

TRANSCRIPT

Hi. I'm Nick at the EEWeb Tech Lab and today I have the latest generation of programmable clocks from IDT.
 
VersaClock® 3S is a family of IDT programmable clocks with innovative features designed specifically for applications requiring low power such as consumer applications and high-performance PCI Express®. VersaClock 3S series has built-in unique features such as Proactive Power Saving, Performance Power Balancing, Overshoot Reduction Technology, and Dynamic Frequency Control.
 
Proactive Power Saving, or PPS, makes the VersaClock 3S the world's first smart generator with downstream device power mode monitor. By monitoring the status of the downstream device's clock the VersaClock 3S is able to dynamically switch its clock when a downstream device enters sleep mode from a MHz output to a 32 kHz output. This dynamic frequency switching decreases a current of each output clock from 5 or 10 milliamps, depending on the application, down to a tiny 2 microamps.
 
Performance Power Balancing, or PPB, allows a user to achieve targeted performance while optimizing power consumption. This targeted power mode can be selected using IDT's GUI called the Timing Commander. The Timing Commander GUI is a free download and can be found at idt.com.
 
IDT's patented Overshoot Reduction Technology affords a smooth frequency transition and keeps a frequency at the targeted frequency. This ORT feature eliminates the overshoot and undershoot common with tradition PLL designs during frequency transitions, which can cause a system to fail.
 
The user-programmable Dynamic Frequency Control, or DFC, provides a user with up to four preprogrammed frequencies for audio clocks, video clocks, overclocking, or motor speed control. These frequencies can be changed on the fly by using either the hardware pins or the I2C registers.
 
Other device features include multiple function OE pins, the support for two differential clocks and three single-ended clocks, and a built-in watchdog timer.
 
So let's take a look at some of the IDT products.
 
So this is the evaluation board and it's designed for customers who want higher-performance measurements. The IC in the middle, this is the VersaClock 3S. And the USB connector, it accepts 2.0 or 3.0 USB. The mode selector switch is right here. And jumper configurations are here to configure the onboard voltage regulators. A crystal clock is right here for reference on the reference signal. And then the user guide, or the manual, can be downloaded from idt.com.
 
This is the programming board and it's available for customers who don't need the high-performance of the evaluation board. It accepts both types of socket boards for either the 20 pin or the 24 pin IC. The USB connection, again, is 2.0 or 3.0. It has onboard DC regulatorsthat are actually on the back side. One is here and one is here. And it's compatible with the IDT Timing Commander GUI. And, again, the user guide is downloadable from idt.com.
 
And this is the socket board. I'll open it up here. There's just a blank part in here right now, but this is where your IC would go. So once you have it in there, then it just connects to this programming board with the sockets, like that. And then you're ready to program.
 
So this is a Timing Commander GUI. I'm going to start it up. I've downloaded it and I've also downloaded the personality file specific for the VersaClock 3S. I'm loading the file now and the personality file shows up. So these two here. And I'll select this one. Takes just a minute for it to load up.
 
So the tabs here - there are three. The diagram obviously shows a pinout of the IC. A tab for bit sets that lets you select the bits. And then a tab for registers. It lets you go in and select different register settings.
 
So if we go back to the diagram pin. This icon here lets you save your settings. This connects to the chip. And this is connection settings here. So the interface or you can change the I2C slave device.
 
And this is the optimization control for PLLs here. VDD, you can change the voltages. The signal types you can change here. And then the spread-spectrum clocking, you can change these, disable them, or enable them.
 
IDT's VersaClock 3S family is the industry's most versatile multi-PLL clock generation and crystal consolidation solution for applications including consumer, industrial, communications, medical, automotive, and battery-powered. These devices are offered in small 3x3 or 4x4 QFN packages which makes them ideal for cost-sensitive and dense applications when there's a desire to reduce BOM parts and/or the PCB footprint.
 
For more information visit idt.com.