The 9DBV0631 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family. The device has 6 output enables for clock management and 3 selectable SMBus addresses.
特長
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LP-HCSL outputs; save 12 resistors compared to standard PCIe devices
- 55 mW typical power consumption in PLL mode; minimal power consumption
- Outputs can optionally be supplied from any voltage between 1.05 and 1.8 V; maximum power savings
- OE# pins; support DIF power management
- HCSL-compatible differential input; can be driven by common clock sources
- Spread spectrum tolerant; allows reduction of EMI
- Programmable slew rate for each output; allows tuning for various line lengths
- Programmable output amplitude; allows tuning for various application environments
- Pin/software selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
- Outputs blocked until PLL is locked; clean system start-up
- Configuration can be accomplished with strapping pins; SMBus interface not required for device control
- 3.3 V tolerant SMBus interface works with legacy controllers
- Space saving 5x5 mm 40-pin VFQFPN; minimal board space
- 3 selectable SMBus addresses; multiple devices can easily share an SMBus segment