The VersaClock 3S devices deliver innovative power-saving features while saving board space by eliminating the need for multiple discrete timing components. Delivering  low power and low jitter scalability, the VersaClock 3S devices meet requirements for widely used standards including PCI Express® Gen 1/2/3 and are ideal for consumer, industrial, computing and automotive applications.

The 5P35023 and 5P35021 chips deliver a unique set of features offering an optimal combination of performance, power and flexibility. 

Proactive Power Saving: the world’s first intelligent timing device to detect power down status of the downstream clocked component, resulting in further energy savings in the system. 

Performance-Power Balancing: a user-friendly interface allowing users to easily minimize power consumption based on targeted performance

Dynamic Frequency Control: supported by one-time programmable (OTP) memory, this feature provides the system the ability to dynamically switch between up to four programmed frequencies, allowing optimized performance and power consumption

Overshoot Reduction Technology: prevents unwanted frequency overshoot that can lead to system failures during fast frequency changes.

The devices have an extremely low-power digitally controlled oscillator supplying the system with a 32.768KHz clock that can be powered by a coin battery, making it ideal for handheld and battery-powered applications.

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VersaClock 3S is a family of IDT programmable clocks that deliver innovative features for an optimal blend of performance, power, and flexibility. The compact products can replace multiple crystals, or crystal oscillators, for a smaller board footprint while maintaining extremely low power consumption and are ideal for consumer, industrial, computing, and automotive applications. 
VersaClock 3S offers less than three picoseconds of RMS phase jitter and supports PCI Express Generation 1, 2, and 3 requirements. A built-in, digitally controlled oscillator provides a low-frequency clock at less than two microamps per real-time clock operation with several years of operation using a coin-cell battery. Three PLLs optimized for different performance levels offer operation from 2 to 15 milliamps, and the device features several unique features to balance power and performance. Frequencies up to 160 megahertz on LVCMOS and up to 500 megahertz on differential outputs are supported and one-time programmable memory is available for programming. 
The VersaClock 3S devices are offered in small three by three and four by four QFN packages. The larger device features three LVCMOS and two differential outputs along with a reference clock output. The smaller device offers a single LVCMOS and two differential clock outputs. 
VersaClock 3S offers several unique features. A performance power balancing feature supported by the IDT Timing Commander GUI easily optimizes power consumption based on target performance. A patented overshoot frequency control feature eliminates frequency overshoot or undershoot that is common with traditional PLL designs during frequency transitions. Dynamic frequency control offers smooth and glitch-free transitions between up to four pre-programmed frequencies for on-the-fly frequency changes.
And VersaClock 3S is the world's first intelligent clock generator with a downstream device power-mode monitor. The proactive power-saving feature monitors the clock status using the Xout pin of the downstream device, and will switch to a very low-power 32 kilohertz clock during a sleep mode, switch back to normal operation when the downstream device wakes up. 
Other device features include a multi-function output that enables pins, along with a built-in watchdog timer. Evaluation and programmer boards along with IDT's Timing Commander software are available to assist with development. The VersaClock 3S family offers an ideal combination of versatility, performance, and low power for a variety of applications. For more information, please visit Thank you.