The 72V3632 is a 3.3V version of the 723632. Two independent 512 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.
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Pkg. Type |
Lead Count (#) |
Temp. Grade |
Pb (Lead) Free |
Carrier Type |
ご購入 / サンプル |
|
---|---|---|---|---|---|---|
型名 | ||||||
TQFP | 120 | C | No | Tray | ||
TQFP | 120 | C | No | Reel | ||
TQFP | 120 | C | Yes | Tray | ||
TQFP | 120 | C | Yes | Reel | ||
PQFP | 132 | C | No | Tray | ||
TQFP | 120 | C | No | Tray | ||
TQFP | 120 | C | No | Reel | ||
TQFP | 120 | I | Yes | Tray | ||
PQFP | 132 | C | No | Tray | ||
TQFP | 120 | I | Yes | Reel |