Renesas offers two options for evaluating high-speed analog-to-digital converter products with LVDS and/or LVCMOS outputs. A complete, turnkey evaluation platform is available, which includes data capture hardware and software to process and display acquired data. This system provides the fastest and easiest path to evaluating an ADC since no additional software coding is required of the user.

The second option is an adapter board that facilitates the connection of an ADC daughter card to an FMC-based FPGA development board. This solution offers greater flexibility since the user has full access to the FPGA functionality and can therefore perform signal processing operations and/or "hardware in the loop" simulations. No software is provided for this option since there are a wide variety of supported FGPA development boards.

More information on JESD204B high-speed serial outputs

Attribute Complete Evaluation Platform FMC Motherboard
Motherboard KMB-001LEVALZ: LVDS interface
KMB001CEVAL: CMOS interface
KMB-FMC-EVALZ
Motherboard contains FPGA Yes No
Capture Memory 1 million words Depends on FPGA development board
Uses ADC Daughter Card Yes Yes
Includes Konverter Analyzer for processing and displaying acquired data Yes No
Allows access to FPGA code No Yes
Allows for "hardware in the loop" simulations No Yes

Disclaimer: THIS MATERIAL IS PROVIDED “AS-IS” FOR EVALUATION PURPOSES ONLY. RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (collectively, “Renesas”) DISCLAIM ALL WARRANTIES, INCLUDING WITHOUT LIMITATION, FITNESS FOR A PARTICULAR PURPOSE AND MERCHANTABILITY. Renesas provides evaluation platforms and design proposals to help our customers to develop products. However, factors beyond Renesas' control, including without limitation, component variations, temperature changes and PCB layout, could significantly affect the product performance. It is the user’s responsibility to verify the actual circuit performance.

特長

  • Datasheet-style live-updated parameter display
  • Integrated SPI controller for ADC configuration
  • 18Mb FIFO captures 1M ADC output samples
  • USB 2.0 interface for rapid data transfer
  • Exports CSV formatted sample records for offline data processing

アプリケーション

  • Power amplifier linearization
  • Radar and satellite antenna array processing
  • Broadband communications
  • High-performance data acquisition
  • Communications test equipment
  • WiMAX and microwave receivers

製品選択

製品名 Part Status 購入/サンプル
KMB-FMC-EVALZ
Active
Availability
KMB-001LEVALZ
Active
Availability
KMB-001CEVALZ
Active
Availability
KDC5612EVAL
Active
Availability
KDC5514EVALZ
Active
Availability
KDC5514-Q48EVAL
Active
Availability
KDC5512HEVALZ
Active
Availability
KDC5512HEVAL
Active
Availability
KDC5512H-Q48EVAL
Active
Availability
KDC5512-Q48EVAL
Active
Availability
ISLA224S25IR48EV1Z
Active
Availability
ISLA224IR72EV1Z
Active
Availability
ISLA216S25IR48EV1Z
Active
Availability
ISLA216IR72EV1Z
Active
Availability
ISLA214S50IR48EV1Z
Active
Availability
ISLA214P50IR72EV1Z
Active
Availability
ISLA214P50-55210EV1Z
Active
Availability
ISLA214IR72EV1Z
Active
Availability
ISLA118P50IR72EV1Z
Active
Availability
ISLA112P50IR72EV1Z
Active
Availability
ISLA112P50/55210EV1Z
Active
Availability
ISLA110P50IR72EV1Z
Active
Availability

ドキュメント&ダウンロード

タイトル language 分類 形式 サイズ 日付
ユーザーガイド、マニュアル
ISLA214P50-55210EV1Z User Guide マニュアル PDF 2.02 MB
KAD-FMC-EVALZ User Guide マニュアル PDF 509 KB
Konverter Analyzer User Guide マニュアル PDF 760 KB
8-Bit to 16-Bit, 40MSPS to 500MSPS ADC Evaluation System User Guide マニュアル PDF 1.02 MB
JESD204B Evaluation Platform User Guide マニュアル PDF 503 KB
iEvalADC User Guide マニュアル PDF 715 KB
ダウンロード
KDC5512-Q48EVAL, KDC5512H-Q48EVAL, KDC5514-Q48EVAL Schematics and Layers 設計ファイル PDF 1.21 MB
ISLA214IR72EV1Z Schematics and Layers 設計ファイル PDF 1.66 MB
ISLA112P50/55210EV1Z Schematics 設計ファイル PDF 56 KB
KDC5512EVAL, KDC5512HEVAL, KDC5512-50EVAL, KDC5514EVAL Schematics and Layers 設計ファイル PDF 483 KB
ISLA112P50/55210EV1Z Layers File 設計ファイル ZIP 246 KB
その他資料
iEvalADC JESD204B HS ADC Evaluation Software v1.04 ライブラリ EXE 4.28 MB