The ADC1413D065HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates of 65 Msps. Pipelined architecture and output error correction ensure the ADC1413D065HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD204A standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. A set of IC configurations is also available via the binary level control pins taken, which are used at power-up.
2 configurable serial outputs
3.3 V, 1.8 V single supplies
Compliant with JESD204A serial transmission standard
Dual channel 14-bit pipelined ADC core
Duty cycle stabilizer
Flexible input voltage range: 1 V (p-p) to 2 V (p-p) with 6 dB programmable fine
IDT's ADC demoboard is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204A feature set.
ADC1413D065W0 demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors
IDT's ADC demostration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera, and Lattice) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204A full features sets