The 8T74S208C-01 is a high-performance differential LVDS clock divider and fanout buffer. The device is designed for the frequency division and signal fanout of high-frequency, low phase-noise clocks. The 8T74S208C-01 is characterized to operate from a 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8T74S208C-01 ideal for those clock distribution applications demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count. Each output can be individually enabled or disabled in the high-impedance state controlled by a I2C register. On power-up, all outputs are disabled.

特長

  • One differential input reference clock
  • Differential pair can accept the following differential input levels:
    LVDS, LVPECL, CML
  • Integrated input termination resistors
  • Eight LVDS outputs
  • Selectable clock frequency division of ÷1, ÷2, ÷4 and ÷8
  • Maximum input clock frequency: 1GHz
  • LVCMOS interface levels for the control inputs
  • Individual output enabled/ disabled by I2C interface
  • Output skew: 45ps (maximum)
  • Output rise/fall times: 370ps (maximum)
  • Low additive phase jitter, RMS: 96fs (typical)
  • Full 2.5V supply voltage
  • Outputs disabled at power-up
  • Lead-free (RoHS 6) 32-Lead VFQFN packaging
  • -40°C to 85°C ambient operating temperature

製品選択

発注型名 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
8T74S208C-01NLGI
Active VFQFPN 32 I はい Tray
Availability
8T74S208C-01NLGI8
Active VFQFPN 32 I はい Reel
Availability

ドキュメント&ダウンロード

タイトル 他の言語 分類 形式 サイズ 日付
データシート
8T74S208C-01 Datasheet データシート PDF 558 KB
アプリケーションノート、ホワイトペーパー
AN-844 Termination - AC Coupling Clock Receivers アプリケーションノート PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection アプリケーションノート PDF 495 KB
AN-840 Jitter Specifications for Timing Signals アプリケーションノート PDF 442 KB
AN-834 Hot-Swap Recommendations アプリケーションノート PDF 153 KB
AN-827 Application Relevance of Clock Jitter アプリケーションノート PDF 1.15 MB
AN-815 Understanding Jitter Units アプリケーションノート PDF 565 KB
AN-805 Recommended Ferrite Beads アプリケーションノート PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 製品変更通知 PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 製品変更通知 PDF 583 KB
PCN# : N1608-01 Redesign of 8T74S208A-01 製品変更通知 PDF 36 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location 製品変更通知 PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location 製品変更通知 PDF 544 KB
PCN# : N1508-01 Die revision change, 8T73S208-01NLGI (8) / 8T74S208-01NLGI (8) 製品変更通知 PDF 761 KB
その他資料
IDT Clock Distribution Overview (Japanese) English 概要 PDF 7.79 MB
IDT Products for Radio Applications (Japanese) English 製品概要 PDF 6.27 MB
IDT Clock Generation Overview (Japanese) English 概要 PDF 2.19 MB

ニュース&各種リソース