The 5T9070 2.5V single data rate (SDR) clock buffer is a single-ended input to ten single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single input to ten single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. The 5T9070 has two output banks that can be asynchronously enabled/ disabled. Multiple power and grounds reduce noise.
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Pkg. Type |
Lead Count (#) |
Temp. Grade |
Pb (Lead) Free |
Carrier Type |
购买 / 样片 |
|
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器件号 | ||||||
TSSOP | 48 | I | Yes | Tube |