The 9DBU0841 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. It has integrated output terminations providing Zo=100 ohms for direct connection to 100 ohm transmission lines. The device has 8 output enables for clock management and 3 selectable SMBus addresses.

特性

  • Direct connection to 100 ohm transmission lines; saves 32 resistors compared to standard PCIe devices
  • 53 mW typical power consumption in PLL mode; minimal power consumption
  • Outputs can optionally be supplied from any voltage between 1.05 and 1.5 V; maximum power savings
  • OE# pins; support DIF power management
  • HCSL-compatible differential input; can be driven by common clock sources
  • Spread spectrum tolerant; allows reduction of EMI
  • LP-HCSL differential clock outputs; reduced power and board space
  • Programmable slew rate for each output; allows tuning for various line lengths
  • Programmable output amplitude; allows tuning for various application environments
  • Pin/software selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
  • Outputs blocked until PLL is locked; clean system start-up
  • Configuration can be accomplished with strapping pins; SMBus interface not required for device control
  • 3.3 V tolerant SMBus interface  works with legacy controllers
  • Space-saving 6x6 mm 48-pin VFQFPN; minimal board space
  • 3 selectable SMBus addresses; multiple devices can easily share an SMBus segment
 

产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9DBU0841AKILF
Active VFQFPN 48 I 是的 Tray
Availability
9DBU0841AKILFT
Active VFQFPN 48 I 是的 Reel
Availability
9DBU0841AKLF
Active VFQFPN 48 C 是的 Tray
Availability
9DBU0841AKLFT
Active VFQFPN 48 C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
9DBU0841 Datasheet 数据手册 PDF 3.65 MB
应用指南 &白皮书
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs 应用文档 PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL 应用文档 PDF 235 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-843 PCI Express Reference Clock Requirements 应用文档 PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 产品变更通告 PDF 583 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 50 KB
PCN# : A1403-03 Gold wire to Copper wire 产品变更通告 PDF 42 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB
PCI Express Timing Solutions Overview 概览 PDF 275 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Fanout Buffers Product Overview 产品简述 PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief 产品简述 PDF 378 KB