The MK1574-01A/B are Phase-Locked Loop (PLL) based clock synthesizers, which accept an 8 kHz clock input as a reference, and generate many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to the 8 kHz backplane clock, simplifying clock generation and distribution in communications systems. 1) MK1574-01A — 5 V operation 2) MK1574-01B — 3.3 V operation IDT manufactures the largest variety of clock generators and buffers, and can customize this device for a variety of frequencies.

特性

  • Packaged in 16-pin SOIC
  • Accepts 8 kHz input clock
  • Output clock rates include T1, E1, T2, E2
  • Available in commercial (0

tune产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete SOIC 16 I 是的 Tube
Availability
Obsolete SOIC 16 I 是的 Reel
Availability

description文档

文档标题 language 类型 文档格式 文件大小 日期
应用指南 & 白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-831 The Crystal Load curve 应用文档 PDF 395 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations 应用文档 PDF 115 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-832 Timing Budget and Accuracy 应用文档 PDF 131 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-830 Quartz Crystal Drive Level 应用文档 PDF 143 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-801 Crystal-High Drive Level 应用文档 PDF 202 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
AN-806 Power Supply Noise Rejection 应用文档 PDF 438 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products 应用文档 PDF 108 KB
其他
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB

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