The 8SLVP1212I is a high-performance, 12 output differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1212I is characterized to operate from a 3.3V and 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVP1212I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and twelve low skew outputs are available. The integrated bias voltage generators enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

特性

  • Twelve low skew, low additive jitter LVPECL outputs
  • Two selectable, differential clock inputs
  • Differential pairs can accept the following differential input levels: LVDS, LVPECL, CML
  • Maximum input clock frequency: 2GHz
  • LVCMOS interface levels for the control input (input select)
  • Output skew: 15ps (typical)
  • Propagation delay: 550ps (maximum)
  • Low additive phase jitter, RMS: <50fs (typical)
  • Full 3.3V and 2.5V supply voltage
  • Device current consumption (IEE): 118mA (typical)
  • Available in Lead-free (RoHS 6), 40-Lead VFQFN package
  • -40°C to 85°C ambient operating temperature

description文档

文档标题 language 类型 文档格式 文件大小 日期
star 8SLVP1212 Datasheet 数据手册 PDF 737 KB
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 产品变更通告 PDF 583 KB
PCN# : TB1311-01 New Carrier Tape on VFQFPN-28, VFQFPN-40, VFQFPN-48 产品变更通告 PDF 790 KB
RF Timing Family Product Overview 概览 PDF 331 KB
Clock Distribution Overview 概览 PDF 217 KB
IDT Clock Generation Overview 概览 PDF 1.83 MB

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文档标题 language 类型 文档格式 文件大小 日期
8SLVP1212I IBIS Model 模型 - IBIS ZIP 72 KB

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