Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, and 667MHz.

特性

  • 28-bit 1:2 registered buffer with parity check functionality
  • Supports SSTL_18 JEDEC specification on data inputs and outputs
  • Supports LVCMOS switching levels on CSGateEN and RESET inputs
  • Low voltage operation: VDD = 1.7V to 1.9V

产品选择

下单器件型号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
SSTUAF32865AHLF
Obsolete CABGA 160 C 是的 Tray
Availability
SSTUAF32865AHLFT
Obsolete CABGA 160 C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
SSTUAF32865A Datasheet 数据手册 PDF 568 KB
PCN / PDN
PCN# : A1604-01 Add OSET Taiwan as Alternate Assembly 产品变更通告 PDF 31 KB
PDN# : CQ-15-03 Quarter PDN for Declined Market 产品停产通告 PDF 542 KB