The 70V639 is a high-speed 128K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.
特性
Dual-Port allows simultaneous access of the same memory location
Dual chip enables allow for depth expansion without external logic
Easily expands data bus width to 36 bits or more using the Master/Slave select when cascading more than one device
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port
Separate byte controls for multiplexed bus and bus matching compatibility
Includes JTAG functionality on BGA package versions only
LVTTL-compatible, single 3.3V (±150mV) power supply for core
LVTTL-compatible, selectable 3.3V (±150mV)/2.5V (±100mV) power supply for I/Os and control signals on each port
Available in a 128-pin TQFP, 208-ball fpBGA and 256-ball BGA
Industrial temperature range (–40C to +85C) is available
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模型
ECAD 模块
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